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Thu, 05 Nov 2026 20:31:00 -0800 (PST) Received: from localhost ([2600:1702:7a90:6f9f:8bc4:8aec:108d:7a04]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-67c13371f3csm1206662d50.3.2026.11.05.20.30.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 20:30:59 -0800 (PST) From: Matt Turner Date: Thu, 05 Nov 2026 23:30:33 -0500 Subject: [PATCH v7 14/14] alpha/perf: honor exclude_user and exclude_kernel for ProfileMe events X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261105-alpha-profileme-v7-14-c474e892abb0@gmail.com> References: <20261105-alpha-profileme-v7-0-c474e892abb0@gmail.com> In-Reply-To: <20261105-alpha-profileme-v7-0-c474e892abb0@gmail.com> To: Richard Henderson , Magnus Lindholm , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Michael Cree Cc: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Matt Turner X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4451; i=mattst88@gmail.com; h=from:subject:message-id; bh=etGiS+KjgiyXzjebY7Rb4XAH8uHilSqEgpWO7GWDiV0=; b=owGbwMvMwCW25rVmCc8sv+mMp9WSGLLeht+9d2HOdUku7mwvlT32rmWdc2//WKtRkn3Wy9BWs /hrhkZHx0cWBjEuhpliiixx6xVZZrXtWOpzWvoXzBxWJpAh0iINDEDAwsCXm5hXaqRjpGeqbahn CGToGMVD5PQYNDKLi0tTi3TTCooc8vJLEksy8/OK9fILUvMK0gv00jLTSjIy8ouKU4FG6OWllpi 6OroZGRqYWDpamDlZOJqaODs7GTq5OTo6uzoZWZqbGDhbOpq4WpozcHEKwFzzM5mRYYNwHC+v9O 6drUE/T8oqhfbqxd7uuGzduS3qRMisJmabM4wMt6/P4mX9diNpfdaF8mojf0HXaRGqR9PWXva3+ hHMc+AEDwA= X-Developer-Key: i=mattst88@gmail.com; a=openpgp; fpr=3BB639E56F861FA2E86505690FDD682D974CA72A The PMU sets PERF_PMU_CAP_NO_EXCLUDE, as the counters count in every mode. perf record then fails for unprivileged users: at the default perf_event_paranoid of 2, the tool sets exclude_kernel for them. A ProfileMe sample says which mode the profiled instruction ran in, so the excluded samples can be dropped, as AMD IBS does with swfilt. Do that for ProfileMe events, counting PALmode as kernel, and ignore exclude_hv, as there is no hypervisor. A sample that falls back to the interrupted PC is dropped if either its PC or the profiled instruction is in an excluded mode. Aggregate events cannot tell, so event_init now rejects their exclude bits itself, along with exclude_idle, exclude_guest and exclude_host for all events. The event count, and what PCTR1 counted during a window, still include the excluded modes. Suggested-by: Ian Rogers Assisted-by: Claude:claude-opus-5-5 Reviewed-by: Magnus Lindholm Tested-by: Magnus Lindholm Signed-off-by: Matt Turner --- arch/alpha/kernel/perf_event.c | 47 ++++++++++++++++++++++++++++++++++-------- 1 file changed, 38 insertions(+), 9 deletions(-) diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c index aa6ec2161ec4..58d132be8d0e 100644 --- a/arch/alpha/kernel/perf_event.c +++ b/arch/alpha/kernel/perf_event.c @@ -844,6 +844,18 @@ static int __hw_perf_event_init(struct perf_event *event) return -EINVAL; hwc->flags = profileme ? ALPHA_PERF_FLAG_PROFILEME : 0; + /* + * The counters count in every mode, but ProfileMe samples say which + * mode the profiled instruction ran in, so those that are excluded can + * be dropped. PALmode counts as kernel, and exclude_hv is ignored, as + * there is no hypervisor. + */ + if (attr->exclude_idle || attr->exclude_guest || attr->exclude_host) + return -EINVAL; + if (!profileme && + (attr->exclude_user || attr->exclude_kernel || attr->exclude_hv)) + return -EINVAL; + if (attr->config1 & ~ALPHA_PERF_CONFIG1_FILTERS) return -EINVAL; if (attr->config1 && !profileme) @@ -995,7 +1007,6 @@ static struct pmu pmu = { .stop = alpha_pmu_stop, .read = alpha_pmu_read, .attr_groups = ev67_attr_groups, - .capabilities = PERF_PMU_CAP_NO_EXCLUDE, }; @@ -1151,6 +1162,24 @@ static u64 alpha_profileme_status(unsigned long i_stat, return status; } +/* + * Whether exclude_user or exclude_kernel rules out a sample of the profiled + * instruction at pmpc, reported at pc. A PALmode PMPC counts as kernel. The + * two differ only when the sample falls back to the interrupted PC, and + * such a sample is then dropped if either mode is excluded. + */ +static bool alpha_profileme_excluded(struct perf_event *event, + unsigned long pmpc, unsigned long pc) +{ + bool pm_user = !(pmpc & EV67_PMPC_PAL) && + (pmpc & EV67_PMPC_PC_MASK) < TASK_SIZE; + bool user = pc < TASK_SIZE; + + if (event->attr.exclude_user && (pm_user || user)) + return true; + return event->attr.exclude_kernel && !(pm_user && user); +} + /* What the memory instruction at pc does, or PERF_MEM_OP_NA. */ static u64 alpha_profileme_mem_op(unsigned long pc) { @@ -1261,14 +1290,6 @@ static void alpha_perf_event_profileme(struct perf_event *event, local64_add(ovr, &hwc->period_left); } - /* A dropped sample still counts, for throttling and frequency mode. */ - if ((alpha_profileme_status(i_stat, pctr_ctl, pmpc) & hwc->config) != - hwc->config) { - if (alpha_perf_event_set_period(event, hwc, 0)) - perf_event_account_interrupt(event); - return; - } - /* * Attribute the sample to the profiled instruction rather than to * wherever the interrupt landed. perf takes the sample's mode, @@ -1313,6 +1334,14 @@ static void alpha_perf_event_profileme(struct perf_event *event, memset(pm_regs, 0, sizeof(*pm_regs)); } + /* A dropped sample still counts, for throttling and frequency mode. */ + if ((alpha_profileme_status(i_stat, pctr_ctl, pmpc) & hwc->config) != + hwc->config || alpha_profileme_excluded(event, pmpc, pc)) { + if (alpha_perf_event_set_period(event, hwc, 0)) + perf_event_account_interrupt(event); + return; + } + perf_sample_data_init(&data, 0, hwc->last_period); if (pc_only) alpha_profileme_drop_regs(event, &data, PERF_SAMPLE_REGS_USER | -- 2.55.0