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Thu, 5 Nov 2026 06:36:35 -0500 (EST) From: Janne Grunau Date: Thu, 05 Nov 2026 12:36:02 +0100 Subject: [PATCH 5/7] arm64: dts: apple: t8122: Add PCIe device nodes X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261105-apple-m3-pcie-v1-5-e00a72a604f8@jannau.net> References: <20261105-apple-m3-pcie-v1-0-e00a72a604f8@jannau.net> In-Reply-To: <20261105-apple-m3-pcie-v1-0-e00a72a604f8@jannau.net> To: Sven Peter , Neal Gompa , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Joshua Peisach , Michael Reeves Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Janne Grunau , Alyssa Milburn X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=11368; i=j@jannau.net; h=from:subject:message-id; bh=6VnD2O3unzh18AVoLbGUnllQO8vAvLOBJtr9smydWkw=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqw3WRpT3Q4+yjGZsCtA4ZOd+YnmZz0bmHdzTynSOrf+1 zcx0/C1HRNZGMS4GCzFFFmStF92MKyuUYypfRAGM4eVCWSItEgDAxCwMPDlJuaVGukY6ZlqG+oZ GukY6xgxcHEKwFRbWDAyfP79MHD66R3lbRki7S/Dsx51RsTIueQarg5ecvaDyIMpPYwM94xY+9O 43aJWWGfpMMs+0gyc9/wAQ+m0JUu6l/0r+7yHFQA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 From: Alyssa Milburn Add the PCIe controller, its ports, IOMMUs and clock request pins to the base M3 Pro .dtsi file. Add PCIe devices for WiFi, Bluetooth, Ethernet, SD-Card reader and USB xHCI to device trees and enable their ports and IOMMU if necessary. The bootloader will fill MAC addresses and calibration data properties in their device nodes. Signed-off-by: Alyssa Milburn Co-developed-by: Michael Reeves Signed-off-by: Michael Reeves Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/t8122-j433.dts | 28 +++++ arch/arm64/boot/dts/apple/t8122-j434.dts | 38 +++++++ arch/arm64/boot/dts/apple/t8122-j504.dts | 26 +++++ arch/arm64/boot/dts/apple/t8122-j613.dts | 8 ++ arch/arm64/boot/dts/apple/t8122-j615.dts | 8 ++ arch/arm64/boot/dts/apple/t8122-jxxx.dtsi | 29 ++++- arch/arm64/boot/dts/apple/t8122.dtsi | 175 ++++++++++++++++++++++++++++++ 7 files changed, 311 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/apple/t8122-j433.dts b/arch/arm64/boot/dts/apple/t8122-j433.dts index 34205d173a9b..6c9185dc01b8 100644 --- a/arch/arm64/boot/dts/apple/t8122-j433.dts +++ b/arch/arm64/boot/dts/apple/t8122-j433.dts @@ -16,4 +16,32 @@ / { compatible = "apple,j433", "apple,t8122", "apple,arm-platform"; model = "Apple iMac (24-inch, 2x USB-C, M3, 2023)"; + + aliases { + ethernet0 = ðernet0; + }; +}; + +&wifi0 { + brcm,board-type = "apple,azores"; +}; + +&bluetooth0 { + brcm,board-type = "apple,azores"; +}; + +&port01 { + bus-range = <2 2>; + + status = "okay"; + + ethernet0: ethernet@0,0 { + reg = <0x20000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address = [00 10 18 00 00 00]; + }; +}; + +&pcie1_dart { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8122-j434.dts b/arch/arm64/boot/dts/apple/t8122-j434.dts index ead5afd77efb..e2f4880095ab 100644 --- a/arch/arm64/boot/dts/apple/t8122-j434.dts +++ b/arch/arm64/boot/dts/apple/t8122-j434.dts @@ -16,4 +16,42 @@ / { compatible = "apple,j434", "apple,t8122", "apple,arm-platform"; model = "Apple iMac (24-inch, 4x USB-C, M3, 2023)"; + + aliases { + ethernet0 = ðernet0; + }; +}; + +&wifi0 { + brcm,board-type = "apple,iona"; +}; + +&bluetooth0 { + brcm,board-type = "apple,iona"; +}; + +&port01 { + bus-range = <2 2>; + + status = "okay"; + + ethernet0: ethernet@0,0 { + reg = <0x20000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address = [00 10 18 00 00 00]; + }; +}; + +&port02 { + bus-range = <3 3>; + + status = "okay"; +}; + +&pcie1_dart { + status = "okay"; +}; + +&pcie2_dart { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8122-j504.dts b/arch/arm64/boot/dts/apple/t8122-j504.dts index e60ec3039196..9a5951ee28c5 100644 --- a/arch/arm64/boot/dts/apple/t8122-j504.dts +++ b/arch/arm64/boot/dts/apple/t8122-j504.dts @@ -32,6 +32,32 @@ led-0 { }; }; +&wifi0 { + brcm,board-type = "apple,tresco"; +}; + +&bluetooth0 { + brcm,board-type = "apple,tresco"; +}; + +&port01 { + /* SD card reader */ + bus-range = <2 2>; + + status = "okay"; + + mmc@0,0 { + compatible = "pci17a0,9755"; + reg = <0x20000 0x0 0x0 0x0 0x0>; + cd-inverted; + wp-inverted; + }; +}; + +&pcie1_dart { + status = "okay"; +}; + &fpwm1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8122-j613.dts b/arch/arm64/boot/dts/apple/t8122-j613.dts index 40274a983849..7fdafe803e57 100644 --- a/arch/arm64/boot/dts/apple/t8122-j613.dts +++ b/arch/arm64/boot/dts/apple/t8122-j613.dts @@ -31,6 +31,14 @@ led-0 { }; }; +&wifi0 { + brcm,board-type = "apple,dnieper"; +}; + +&bluetooth0 { + brcm,board-type = "apple,dnieper"; +}; + &fpwm1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8122-j615.dts b/arch/arm64/boot/dts/apple/t8122-j615.dts index 61833f6d019b..d32686f88b76 100644 --- a/arch/arm64/boot/dts/apple/t8122-j615.dts +++ b/arch/arm64/boot/dts/apple/t8122-j615.dts @@ -31,6 +31,14 @@ led-0 { }; }; +&wifi0 { + brcm,board-type = "apple,tuzla"; +}; + +&bluetooth0 { + brcm,board-type = "apple,tuzla"; +}; + &fpwm1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi index 2dbdb77d5413..c184dd94e8c7 100644 --- a/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi @@ -11,7 +11,9 @@ / { aliases { + bluetooth0 = &bluetooth0; serial0 = &serial0; + wifi0 = &wifi0; }; chosen { @@ -22,7 +24,8 @@ chosen { stdout-path = "serial0"; framebuffer0: framebuffer@0 { - compatible = "apple,simple-framebuffer", "simple-framebuffer"; + compatible = "apple,simple-framebuffer", + "simple-framebuffer"; reg = <0 0 0 0>; /* To be filled by loader */ power-domains = <&ps_disp_cpu>, <&ps_dptx_ext_phy>; /* Format properties will be added by loader */ @@ -47,3 +50,27 @@ memory@800000000 { &serial0 { status = "okay"; }; + +/* + * Force the bus number assignments so that we can declare some of the + * on-board devices and properties that are populated by the bootloader + * (such as MAC addresses). + */ +&port00 { + bus-range = <1 1>; + + wifi0: wifi@0,0 { + compatible = "pci14e4,4434"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address = [00 00 00 00 00 00]; + apple,antenna-sku = "XX"; + }; + + bluetooth0: bluetooth@0,1 { + compatible = "pci14e4,5f72"; + reg = <0x10100 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-bd-address = [00 00 00 00 00 00]; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8122.dtsi b/arch/arm64/boot/dts/apple/t8122.dtsi index 959ddf36efa1..241a32dfe011 100644 --- a/arch/arm64/boot/dts/apple/t8122.dtsi +++ b/arch/arm64/boot/dts/apple/t8122.dtsi @@ -338,6 +338,14 @@ i2c4_pins: i2c4-pins { pinmux = , ; }; + + pcie_pins: pcie-pins { + // clkreq pins + pinmux = , + , + , + ; + }; }; pmgr: power-management@2d0700000 { @@ -494,6 +502,173 @@ nvme: nvme@30dcc0000 { apple,sart = <&sart>; }; + + pcie0: pcie@580000000 { + device_type = "pci"; + compatible = "apple,t8122-pcie", "apple,t6020-pcie"; + + reg = <0x5 0x80000000 0x0 0x1000000>, /* config */ + <0x5 0x91000000 0x0 0x4000>, /* rc */ + <0x5 0x94008000 0x0 0x4000>, /* port0 */ + <0x5 0x95008000 0x0 0x4000>, /* port1 */ + <0x5 0x96008000 0x0 0x4000>, /* port2 */ + <0x5 0x97008000 0x0 0x4000>, /* port3 */ + <0x5 0x9e00c000 0x0 0x4000>, /* phy0 */ + <0x5 0x9e010000 0x0 0x4000>, /* phy1 */ + <0x5 0x9e014000 0x0 0x4000>, /* phy2 */ + <0x5 0x9e018000 0x0 0x4000>; /* phy3 */ + reg-names = "config", "rc", + "port0", "port1", "port2", "port3", + "phy0", "phy1", "phy2", "phy3"; + ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, + <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; + + #address-cells = <3>; + bus-range = <0 4>; + + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + + iommu-map = <0x100 &pcie0_dart 1 1>, + <0x200 &pcie1_dart 1 1>, + <0x300 &pcie2_dart 1 1>, + <0x400 &pcie3_dart 1 1>; + iommu-map-mask = <0xff00>; + + msi-controller; + msi-parent = <&pcie0>; + msi-ranges = <&aic AIC_IRQ 1075 IRQ_TYPE_EDGE_RISING 32>; + + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + + power-domains = <&ps_apcie_gp>; + + #size-cells = <2>; + + port00: pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + ranges; + #address-cells = <3>; + + #interrupt-cells = <1>; + interrupt-controller; + interrupt-map = <0 0 0 1 &port00 0 0 0 0>, + <0 0 0 2 &port00 0 0 0 1>, + <0 0 0 3 &port00 0 0 0 2>, + <0 0 0 4 &port00 0 0 0 3>; + interrupt-map-mask = <0 0 0 7>; + + reset-gpios = <&pinctrl_ap 187 GPIO_ACTIVE_LOW>; + #size-cells = <2>; + }; + + port01: pci@1,0 { + device_type = "pci"; + reg = <0x800 0x0 0x0 0x0 0x0>; + ranges; + #address-cells = <3>; + + #interrupt-cells = <1>; + interrupt-controller; + interrupt-map = <0 0 0 1 &port01 0 0 0 0>, + <0 0 0 2 &port01 0 0 0 1>, + <0 0 0 3 &port01 0 0 0 2>, + <0 0 0 4 &port01 0 0 0 3>; + interrupt-map-mask = <0 0 0 7>; + + reset-gpios = <&pinctrl_ap 188 GPIO_ACTIVE_LOW>; + #size-cells = <2>; + + status = "disabled"; + }; + + port02: pci@2,0 { + device_type = "pci"; + reg = <0x1000 0x0 0x0 0x0 0x0>; + ranges; + #address-cells = <3>; + + #interrupt-cells = <1>; + interrupt-controller; + interrupt-map = <0 0 0 1 &port02 0 0 0 0>, + <0 0 0 2 &port02 0 0 0 1>, + <0 0 0 3 &port02 0 0 0 2>, + <0 0 0 4 &port02 0 0 0 3>; + interrupt-map-mask = <0 0 0 7>; + + reset-gpios = <&pinctrl_ap 189 GPIO_ACTIVE_LOW>; + #size-cells = <2>; + + status = "disabled"; + }; + + port03: pci@3,0 { + device_type = "pci"; + reg = <0x1800 0x0 0x0 0x0 0x0>; + ranges; + #address-cells = <3>; + + #interrupt-cells = <1>; + interrupt-controller; + interrupt-map = <0 0 0 1 &port03 0 0 0 0>, + <0 0 0 2 &port03 0 0 0 1>, + <0 0 0 3 &port03 0 0 0 2>, + <0 0 0 4 &port03 0 0 0 3>; + interrupt-map-mask = <0 0 0 7>; + + reset-gpios = <&pinctrl_ap 190 GPIO_ACTIVE_LOW>; + #size-cells = <2>; + + status = "disabled"; + }; + }; + + pcie0_dart: iommu@594000000 { + compatible = "apple,t8122-dart", "apple,t8110-dart"; + reg = <0x5 0x94000000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + power-domains = <&ps_apcie_gp>; + }; + + pcie1_dart: iommu@595000000 { + compatible = "apple,t8122-dart", "apple,t8110-dart"; + reg = <0x5 0x95000000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + power-domains = <&ps_apcie_gp>; + + status = "disabled"; + }; + + pcie2_dart: iommu@596000000 { + compatible = "apple,t8122-dart", "apple,t8110-dart"; + reg = <0x5 0x96000000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + power-domains = <&ps_apcie_gp>; + + status = "disabled"; + }; + + pcie3_dart: iommu@597000000 { + compatible = "apple,t8122-dart", "apple,t8110-dart"; + reg = <0x5 0x97000000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + power-domains = <&ps_apcie_gp>; + + status = "disabled"; + }; }; timer { -- 2.56.0