From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Joey Gouly <joey.gouly@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
stable@vger.kernel.org
Subject: [PATCH 1/2] arm64: suspend: Save POR_EL0 over suspend
Date: Thu, 05 Nov 2026 16:05:04 +0000 [thread overview]
Message-ID: <20261105-arm64-fix-sysreg-suspend-v1-1-f4d9a99fec46@kernel.org> (raw)
In-Reply-To: <20261105-arm64-fix-sysreg-suspend-v1-0-f4d9a99fec46@kernel.org>
POR_EL0 is a live EL0 register on systems with S1POE but it is not saved
and restored by cpu_do_suspend()/cpu_do_resume(). This means that the task
that initiated suspend can return to userspace with an UNKNOWN value. Fix
this by saving and restoring the value over suspend.
This increases the size of struct cpu_suspend_ctx.
Fixes: bf83dae90fbc ("arm64: enable the Permission Overlay Extension for EL0")
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
---
arch/arm64/include/asm/suspend.h | 2 +-
arch/arm64/mm/proc.S | 8 ++++++++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/suspend.h b/arch/arm64/include/asm/suspend.h
index a5abf0615594..eb9ce315f146 100644
--- a/arch/arm64/include/asm/suspend.h
+++ b/arch/arm64/include/asm/suspend.h
@@ -2,7 +2,7 @@
#ifndef __ASM_SUSPEND_H
#define __ASM_SUSPEND_H
-#define NR_CTX_REGS 15
+#define NR_CTX_REGS 16
#define NR_CALLEE_SAVED_REGS 12
/*
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index b1516630904d..664ea9e3b9ad 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -117,6 +117,10 @@ alternative_else_nop_endif
alternative_if ARM64_SME
mrs_s x2, SYS_TPIDR2_EL0
str x2, [x0, #112]
+alternative_else_nop_endif
+alternative_if ARM64_HAS_S1POE
+ mrs x2, REG_POR_EL0
+ str x2, [x0, #120]
alternative_else_nop_endif
ret
SYM_FUNC_END(cpu_do_suspend)
@@ -160,6 +164,10 @@ alternative_if ARM64_SME
ldr x2, [x0, #112]
msr_s SYS_TPIDR2_EL0, x2
alternative_else_nop_endif
+alternative_if ARM64_HAS_S1POE
+ ldr x2, [x0, #120]
+ msr REG_POR_EL0, x2
+alternative_else_nop_endif
msr sctlr_el1, x12
set_this_cpu_offset x13
--
2.47.3
next prev parent reply other threads:[~2026-11-05 16:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 16:05 [PATCH 0/2] arm64/suspend: Save more registers " Mark Brown
2026-11-05 16:05 ` Mark Brown [this message]
2026-11-11 13:33 ` [PATCH 1/2] arm64: suspend: Save POR_EL0 " Vladimir Murzin
2026-11-11 13:52 ` Mark Brown
2026-11-05 16:05 ` [PATCH 2/2] arm64: suspend: Save GCS state " Mark Brown
2026-11-11 13:44 ` Vladimir Murzin
2026-11-11 13:55 ` Mark Brown
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