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Thu, 05 Nov 2026 06:01:42 -0800 (PST) Received: from lab01.myowncloud.network ([2601:cb:4000:1c5:5396:7ba1:d08a:ebca]) by smtp.gmail.com with ESMTPSA id 00721157ae682-8b3099ae415sm40127677b3.35.2026.11.05.06.01.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 06:01:40 -0800 (PST) From: Amit Patole Date: Thu, 05 Nov 2026 09:01:31 -0500 Subject: [PATCH] coresight: fix stale and misspelled kernel-doc member names X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261105-kdoc-coresight-v1-1-eb2b2ff5b677@gmail.com> X-B4-Tracking: v=1; b=H4sIADqM7GoC/yXMTQ5AMBBA4avIrDVpG/9XEQvawZCodBCJuLti+ S3eu4DREzJU0QUeD2JyS4CKIzBjuwwoyAaDljpTSqZits4I4zwyDeMmSlkonSS6tXkHIVo99nR +w7r5zXs3odneC9z3A3OnyqxyAAAA X-Change-ID: 20261105-kdoc-coresight-90812442ad7b To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Alexander Shishkin Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Amit Patole X-Mailer: b4 0.15.2 Several kernel-doc comments in the CoreSight headers have drifted from the structures they describe, which makes scripts/kernel-doc warn. Update them to match the code: - coresight-cti.h: @nt_trig_con is a typo for nr_trig_con. - coresight-etm.h: @use_cpu14 is a typo for use_cp14, and @base was replaced by @csa in commit a1b0e77ce517 ("coresight: etm3x: Convert raw base pointer to struct coresight access"). - coresight-etm4x.h: @bb_ctrl is not described, and @ss_status was moved out of struct etmv4_config into struct etmv4_drvdata (where it is already documented) in commit b5022acaee3b ("coresight: etm4x: exclude ss_status from drvdata->config"). For struct etmv4_drvdata, the comment names the wrong structure (etm4_drvdata), and @mode was moved to struct coresight_device in commit 9cae77cf23e3 ("coresight: Move mode to struct coresight_device"). - coresight-priv.h: the comment names struct cs_buffer instead of struct cs_buffers. This reduces the kernel-doc warnings in these four headers from 13 to 3. The struct etm4_save_state comment is intentionally left alone: correcting its name makes kernel-doc parse it and report its ~37 undocumented register fields, which is better handled separately. The warnings were found by running scripts/kernel-doc over the tree. An AI coding assistant (Claude Opus 5.5) was used to locate the warnings and draft this change; it was verified with scripts/kernel-doc and checkpatch. No functional change. Signed-off-by: Amit Patole --- Comment-only change. Not build-tested on arm64 (no arm64 toolchain available); every changed line is inside a kernel-doc comment. --- drivers/hwtracing/coresight/coresight-cti.h | 2 +- drivers/hwtracing/coresight/coresight-etm.h | 4 ++-- drivers/hwtracing/coresight/coresight-etm4x.h | 6 +++--- drivers/hwtracing/coresight/coresight-priv.h | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracing/coresight/coresight-cti.h index c5f9e79fabc6..a11a8a4f022f 100644 --- a/drivers/hwtracing/coresight/coresight-cti.h +++ b/drivers/hwtracing/coresight/coresight-cti.h @@ -97,7 +97,7 @@ struct cti_trig_con { /** * struct cti_device - description of CTI device properties. * - * @nt_trig_con: Number of external devices connected to this device. + * @nr_trig_con: Number of external devices connected to this device. * @ctm_id: which CTM this device is connected to (by default it is * assumed there is a single CTM per SoC, ID 0). * @trig_cons: list of connections to this device. diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index cf65d89a8e98..9cd1b9aef5bb 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -231,14 +231,14 @@ struct etm_config { /** * struct etm_drvdata - specifics associated to an ETM component - * @base: memory mapped base address for this component. + * @csa: CoreSight access descriptor for this component's registers. * @atclk: optional clock for the core parts of the ETM. * @csdev: component vitals needed by the framework. * @spinlock: only one at a time pls. * @cpu: the cpu this component is affined to. * @arch: ETM/PTM version number. * @caps: ETM capabilities. - * @use_cpu14: true if management registers need to be accessed via CP14. + * @use_cp14: true if management registers need to be accessed via CP14. * @sticky_enable: true if ETM base configuration has been done. * @boot_enable:true if we should start tracing at boot time. * @os_unlock: true if access to management registers is allowed. diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 5417280cdb27..0787825227fd 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -923,6 +923,8 @@ struct etmv4_caps { * @syncfreq: Controls how often trace synchronization requests occur. * the TRCCCCTLR register. * @ccctlr: Sets the threshold value for cycle counting. + * @bb_ctrl: Controls which regions in the memory map are enabled to + * use branch broadcasting. * @vinst_ctrl: Controls instruction trace filtering. * @viiectlr: Set or read, the address range comparators. * @vissctlr: Set, or read, the single address comparators that control the @@ -941,7 +943,6 @@ struct etmv4_caps { * @res_ctrl: Controls the selection of the resources in the trace unit. * @ss_idx: Single-shot index selector. * @ss_ctrl: Controls the corresponding single-shot comparator resource. - * @ss_status: The status of the corresponding single-shot comparator. * @ss_pe_cmp: Selects the PE comparator inputs for Single-shot control. * @addr_idx: Address comparator index selector. * @addr_val: Value for address comparator. @@ -1051,13 +1052,12 @@ struct etmv4_save_state { }; /** - * struct etm4_drvdata - specifics associated to an ETM component + * struct etmv4_drvdata - specifics associated to an ETM component * @pclk: APB clock if present, otherwise NULL * @atclk: Optional clock for the core parts of the ETMv4. * @base: Memory mapped base address for this component. * @csdev: Component vitals needed by the framework. * @spinlock: Only one at a time pls. - * @mode: This tracer's mode, i.e sysFS, Perf or disabled. * @cpu: The cpu this component is affined to. * @arch: ETM architecture version. * @caps: ETM capabilities. diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index dddac946659f..d55929aedb32 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -91,7 +91,7 @@ enum etm_addr_type { }; /** - * struct cs_buffer - keep track of a recording session' specifics + * struct cs_buffers - keep track of a recording session' specifics * @cur: index of the current buffer * @nr_pages: max number of pages granted to us * @pid: PID this cs_buffer belongs to --- base-commit: 05441d697f7f9a927264f4058cbbc6a03dfcac9d change-id: 20261105-kdoc-coresight-90812442ad7b Best regards, -- Amit Patole