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charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261105-rockchip-pcie-system-suspend-v9-8-a2e55846649e@collabora.com> References: <20261105-rockchip-pcie-system-suspend-v9-0-a2e55846649e@collabora.com> In-Reply-To: <20261105-rockchip-pcie-system-suspend-v9-0-a2e55846649e@collabora.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , Jingoo Han , Shawn Lin , Liam Girdwood , Mark Brown , "Yury Norov (NVIDIA)" , Nicolas Frattaroli Cc: Alexey Charkov , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1696; i=sebastian.reichel@collabora.com; h=from:subject:message-id; bh=PoEgush9aFsqQlzS0lqV9IGVwSbPS6uQnjHBJkFkonc=; b=owJ4nAFtApL9kA0DAAoB2O7X88g7+poByyZiAGrshZbT8DYydnK1H+vhzDkeZihraJeSXlrcR f43OEulWH2SgokCMwQAAQoAHRYhBO9mDQdGP4tyanlUE9ju1/PIO/qaBQJq7IWWAAoJENju1/PI O/qaXFEP/1piWnY13VMQD5+HXTGoxklRz8Of/4yzLfGzQbZyZglyoaZKS1CIdOo/Mf5TiUn06pN 6aPKL45MThnVfl/IU+wV3sZOBOu/1/1FWeawIrgcKr9Jlo5MyuNsmXrssx6E+E9YazzG6X22v1a X9v7ethg9Sk3g/3TXHvyHgP5as02IVlw3MXYS6JR55tzirg2/iaMDDe0BQBkb7OgRl8Vd1TLTcq z6SmPhxS1kXglKFMBswrGj8IYLlG3rmR8tFgzBxDMPEkn8wPa400pu+2DevlqxBvLHJAIECe9qw W09/65qjxNdp6U3KwYbda2h9B6VwLmIYaew6xZSPGWasPDD2IuoxCZTYUEs/YJY0hIj2xRjn01x e693akWrTIEBW/9ERDzAmVBNwZl26HayK66xJrkEUq81lLMIulsn3ZO8PIY9JJTkiK8nRqA4Mmg oh2zrelWj2Bj7m3rMQR1QbYHDDpXORPt0kpDwJN3fZr7SN0RcPgxAzIp6pnRnfzD0pgjz8o6z6p hJasrR867gaFh/u67Ir/Z5+/PfphZkfqQqDlWjLKgPeABm074xdQlLXL4Z7j1XvHa+aTzwOOMOZ IIzVAMuxXAU0EBJdxRKCfeQqxkfIBA+SyIXIgqjOPFxPAS1U/0kBieKlCjpzuTv9Gr271+Fc51L 9lBDUgDzgE+suB+uEH9gqRQ== X-Developer-Key: i=sebastian.reichel@collabora.com; a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A During system suspend, the Rockchip RC driver effectively powers off the controller. If the link is in L1SS and the endpoint asserts CLKREQ# to exit L1SS, the time required to wake the system and restore the PHY/REFCLK may exceed the L1SS exit timing (L10_REFCLK_ON + T_COMMONMODE), resulting in Link Down (LDn) and a reset of the endpoint. Set broken_l1ss_resume flag to indicate this limitation to the PCIe framework. This results in pci_suspend_retains_context() returning false and PCIe client can avoid relying on device state being preserved during system suspend. Reviewed-by: Shawn Lin Signed-off-by: Sebastian Reichel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index d8968743732c..a603475d4450 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -448,6 +448,11 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp) return 0; } +static void rockchip_pcie_host_post_init(struct dw_pcie_rp *pp) +{ + pp->bridge->broken_l1ss_resume = true; +} + static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); @@ -487,6 +492,7 @@ static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp) static const struct dw_pcie_host_ops rockchip_pcie_host_ops = { .init = rockchip_pcie_host_init, + .post_init = rockchip_pcie_host_post_init, .pme_turn_off = rockchip_pcie_pme_turn_off, }; -- 2.53.0