From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=209.85.215.199 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1793922460; b=ZIY7gv50pG0/PKiWjNjk9bl4WWDlHH4eEG0P9jzGc2yiNVekUBXGGN2FOcmPt1EVKCRy LclPDl+mqGLgC4sswDq+d2QilzHxhqiQj4BpitEoK4EQoYclNE8KtS2/PBlhHuhB/dhg2 cgmz9j5uSaQHsU21QX0LmF+9LOBM7CWoUkY7ajcvdPYfgTJaWDSOumWOLkmcL9IlQOhqT SXR9bC/lnSHSwJh7QCBX3+4gtGdSiHxaUJhsWKcdvpgr9TEdd+wWVchAxx1h57hyOgPYY SY/FLgRStmdIUvPH6H5Oc1hO8zu//aMYI/QfjfRWlj1XavI/5kq8lw7TaRIBXu5TIXA== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1793922460; h=DMARC-Filter:Received:DKIM-Signature:X-Google-DKIM-Signature: X-Forwarded-Encrypted:X-Gm-Message-State:X-Received:Date:In-Reply-To: Mime-Version:References:X-Developer-Key:X-Developer-Signature: X-Mailer:Message-ID:Subject:From:To:Cc:Content-Type; bh=BIvq2twJN7ywQe2MXD0v3BY55Do1zzPrR1ch4dMWy9w=; b=RSPU2OkUidsyI8VqMIiANh5mWItPRUXOlx1zkv0ryHtpMwZSvb+jQlO/M6uFKrltp9af 7X3YykuBO3Q4BOEvoS64mhTsVjrZ6sN1Gh1lF0BMCaOs+f2d3wn6LWIAw6W+Jlfc66svb kzOnMbJmDYNqyC00vxYJs+qI86XC11IGLwC6VpsxeIKZ9QwgFMAabmldF0g5N4raUlbw9 rlXKUresuuNwTklFb2of3L+N19DYAFqvh8OwxB6gCTe4hGCIVf25N9zYPbbyRZWshRdCn nUHiJM0nTU1ZHxSKlGOn5uW+3Oz5kD+dZ3YvDpdk2/2YbXTrmJi97Q6cRg5DSSrFjZw== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass header.from=google.com; spf=pass smtp.mailfrom=flex--wyihan.bounces.google.com; dkim=pass header.d=google.com header.i=@google.com header.a=rsa-sha256 header.s=20260707 header.b=owVufQMv; arc=none smtp.remote-ip=209.85.215.199 Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DF61606D835 for ; Thu, 5 Nov 2026 23:47:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org 7DF61606D835 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--wyihan.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=google.com header.i=@google.com header.a=rsa-sha256 header.s=20260707 header.b=owVufQMv Received: by mail-pg1-f199.google.com with SMTP id 41be03b00d2f7-cc7d2ff0087so60480a12.0 for ; Thu, 05 Nov 2026 15:47:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20260707; t=1793922460; x=1794527260; darn=vger.kernel.org; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:from:to:cc:subject:date:message-id:reply-to :content-type; bh=BIvq2twJN7ywQe2MXD0v3BY55Do1zzPrR1ch4dMWy9w=; b=owVufQMvvvHMU90pHDkFNdyjZ/nfGZPOUorK/Sqwt6BZKD8Q1eUdu9NFGHyQZibA4C vvqflENo0lFoGGsaFV+q1jK+5T7IzcUZzMLmyfCSbaCNxOrNxnVRe8tUy8zIpsPix1Qj 2bABdLbnYtQ0GMvmdO+KW/Of9BbjuISbhfTi1yUQw4CJPLPT2hNo0WEpIlmBNRBXi0bP TRYBILZqnkib7FWOiJxAUJ2YC/wAdWfcv+3/KlZA1yYJndOHgnoeEB4HzJRXG1Oofalw gBGOlwWuyKryeXTxzGxsAfrwjoSOHxTZg5jCkpbE7S+AlE06zmxpRKbn/eauirxI8wdf E2gQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1793922460; x=1794527260; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=BIvq2twJN7ywQe2MXD0v3BY55Do1zzPrR1ch4dMWy9w=; b=NSnnPlFgAx0JJLdvu1bNpimUI3a4svKOxc1eaCKvU21r1tTLR4FKtyWVZxiZk3krgt u7QOEqWKB0aCrZaSBbFS385nDE9JNFvMI+dpPeza0OnBB9UTW69CsmMKyONYm7w3li6S udqPS4Ril8GDdCXxJYxVqw8aXd5Ao93+pYGKnDJxVzgU42jF6sVrm0Me3eLirzXDMiny gTBA2mgQgKPgW+nr3s1BGp1mlHBb1XuCsDKcpqCgw8jQWbwuQkUBulYuTR0HiV467oqq X54tOMCM5TbK4+Wg7ix9BviSiB6GRKDnlGVJ1tF5DjgmKrNK/NSRcWrDxzkmZtqUf1RQ nvGQ== X-Forwarded-Encrypted: i=1; AKwUvByQvsLRsD9Nxs23yp10T7lcqYzAflp91OHWDc34o9IZwVzSeVpazjMEqWj4d+QdZuUhwFclQnulXmr8oWk=@vger.kernel.org X-Gm-Message-State: APuU4Z9oclEpnI+qHEvlRiQn2iyZhv9kb7NoEA508QNWt1k0Pb9KvWog kLNymrtAJWlVWh9XyhCWGcaBNH5AFw0mcu/2LEe+sUxDyGN+tyew0TS/RjgEua88sACEc4Rtfz0 oMHzQjA== X-Received: from pjk15.prod.google.com ([2002:a17:90b:558f:b0:3b0:af53:d7ce]) (user=wyihan job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:4acc:b0:3b0:cc3e:68b5 with SMTP id 98e67ed59e1d1-3b0db69fde7mr616588a91.21.1793922459423; Thu, 05 Nov 2026 15:47:39 -0800 (PST) Date: Thu, 05 Nov 2026 23:46:51 +0000 In-Reply-To: <20261105-tdx-selftests-v16-0-2024e8fa517a@google.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list Mime-Version: 1.0 References: <20261105-tdx-selftests-v16-0-2024e8fa517a@google.com> X-Developer-Key: i=wyihan@google.com; a=ed25519; pk=cRi0fKzS5BMxlHyHY2pJv3w/1zcgfYKr6EYGYppdMYc= X-Developer-Signature: v=1; a=ed25519-sha256; t=1793922452; l=4800; i=wyihan@google.com; s=20260319; h=from:subject:message-id; bh=9w4aCd0NJSPoyyt+QfxGA+enh5/AVF2bSD9/TlOuiaQ=; b=u/9rCWq7ncDRc0kMmnOkJgVvLA07LRTuPZsOwR5b1g7BldqLm7GLjbWOjCIDaWB77MhLJ7Vac NveXnQo43UqBB0cpeXiPF/KofVlik6em0VtUS1XoUlAATpXtCTJUv7U X-Mailer: b4 0.14.3 Message-ID: <20261105-tdx-selftests-v16-7-2024e8fa517a@google.com> Subject: [PATCH v16 07/20] KVM: selftests: Add TDX boot code From: Lisa Wang To: Andrew Jones , Ackerley Tng , Binbin Wu , Chao Gao , Chenyi Qiang , Dave Hansen , Erdem Aktas , Ira Weiny , Isaku Yamahata , Kiryl Shutsemau , linux-kselftest@vger.kernel.org, Paolo Bonzini , "Pratik R. Sampat" , Reinette Chatre , Rick Edgecombe , Roger Wang , Ryan Afranji , Sagi Shahar , Sean Christopherson , Shuah Khan , Xiaoyao Li , Oliver Upton Cc: Jeremiah McReynolds , kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, x86@kernel.org, Lisa Wang Content-Type: text/plain; charset="utf-8" From: Erdem Aktas Add code to boot a TDX test VM. Since TDX registers are inaccessible to KVM, the boot code loads the relevant values from memory into the registers before jumping to the guest code. Co-developed-by: Ackerley Tng Signed-off-by: Ackerley Tng Co-developed-by: Sagi Shahar Signed-off-by: Sagi Shahar Co-developed-by: Lisa Wang Signed-off-by: Lisa Wang Signed-off-by: Erdem Aktas Reviewed-by: Binbin Wu Reviewed-by: Xiaoyao Li --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/include/x86/tdx/td_boot.h | 21 ++++++- tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S | 65 ++++++++++++++++++++++ 3 files changed, 84 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm index 08031ab1825b..5136f49c502b 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -32,6 +32,7 @@ LIBKVM_x86 += lib/x86/svm.c LIBKVM_x86 += lib/x86/tdx/tdx_util.c LIBKVM_x86 += lib/x86/ucall.c LIBKVM_x86 += lib/x86/vmx.c +LIBKVM_x86 += lib/x86/tdx/td_boot.S LIBKVM_arm64 += lib/arm64/gic.c LIBKVM_arm64 += lib/arm64/gic_v3.c diff --git a/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h b/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h index bf2282931d49..577e7b23c51c 100644 --- a/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h +++ b/tools/testing/selftests/kvm/include/x86/tdx/td_boot.h @@ -2,9 +2,6 @@ #ifndef SELFTEST_TDX_TD_BOOT_H #define SELFTEST_TDX_TD_BOOT_H -#include -#include - /* * Layout for boot section (not to scale) * @@ -24,7 +21,19 @@ * | | * | | * |___________________________|____ 0x0_ffff_0000: TD_BOOT_PARAMETERS_GPA + * + * TD_BOOT_PARAMETERS_GPA is arbitrarily chosen to + * + * + be within the 4GB address space + * + provide enough contiguous memory for the struct td_boot_parameters such + * that there is one struct td_per_vcpu_parameters for KVM_MAX_VCPUS */ +#define TD_BOOT_PARAMETERS_GPA 0xffff0000 + +#ifndef __ASSEMBLER__ + +#include +#include /* * The exact memory layout for LGDT or LIDT instructions. @@ -63,4 +72,10 @@ struct td_boot_parameters { struct td_per_vcpu_parameters per_vcpu[]; }; +extern u8 td_boot[], td_boot_code_end[]; + +#define TD_BOOT_CODE_SIZE (td_boot_code_end - td_boot) + +#endif /* #ifndef __ASSEMBLER__ */ + #endif /* SELFTEST_TDX_TD_BOOT_H */ diff --git a/tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S b/tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S new file mode 100644 index 000000000000..726ec51e040e --- /dev/null +++ b/tools/testing/selftests/kvm/lib/x86/tdx/td_boot.S @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "tdx/td_boot.h" +#include "tdx/td_boot_offsets.h" +#include "processor_asm.h" + +.code32 + +.globl td_boot +td_boot: + /* + * Paging is turned off. + * + * Register usage throughout td_boot: + * ebx: Address of global boot parameters (Must be preserved) + * eax: Address of per-vCPU parameters (Must be preserved) + * edi, edx: Temporary scratch registers + */ + cli + + movl $TD_BOOT_PARAMETERS_GPA, %ebx + + /* + * Find the address of struct td_per_vcpu_parameters for this + * vCPU based on esi (TDX spec: initialized with vCPU id). Put + * struct address into eax for indirect addressing. + */ + movl $SIZEOF_TD_PER_VCPU_PARAMETERS, %eax + mul %esi + leal TD_BOOT_PARAMETERS_PER_VCPU(%ebx), %edi + addl %edi, %eax + + /* Setup stack. */ + movl TD_PER_VCPU_PARAMETERS_ESP_GVA(%eax), %esp + + /* Setup GDT. */ + leal TD_BOOT_PARAMETERS_GDT(%ebx), %edi + lgdt (%edi) + + /* Setup IDT. */ + leal TD_BOOT_PARAMETERS_IDT(%ebx), %edi + lidt (%edi) + + /* + * Set up control registers (x86 does not support moving memory + * directly to a control register). + */ + movl TD_BOOT_PARAMETERS_CR4(%ebx), %edi + movl %edi, %cr4 + movl TD_BOOT_PARAMETERS_CR3(%ebx), %edi + movl %edi, %cr3 + movl TD_BOOT_PARAMETERS_CR0(%ebx), %edi + movl %edi, %cr0 + + /* Switching to 64bit mode after ljmp and then jump to guest code */ + ljmp $(KERNEL_CS),$1f +1: + jmp *TD_PER_VCPU_PARAMETERS_GUEST_CODE(%eax) + +/* Leave marker so size of td_boot code can be computed. */ +.globl td_boot_code_end +td_boot_code_end: + +/* Disable executable stack. */ +.section .note.GNU-stack,"",%progbits -- 2.56.0.455.g6c5a503b38-goog