From: Ian Rogers <irogers@google.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>, Jiri Olsa <jolsa@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
James Clark <james.clark@linaro.org>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Edward Baker <edward.baker@intel.com>,
Thomas Falcon <thomas.falcon@intel.com>,
Perry Taylor <perry.taylor@intel.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: kernel test robot <yi1.lai@intel.com>
Subject: [PATCH v1] perf jevents: Don't encode MSRs with no value
Date: Wed, 4 Nov 2026 20:48:41 -0800 [thread overview]
Message-ID: <20261105044841.102295-1-irogers@google.com> (raw)
Fixes the events mem_trans_retired.load_latency (EMR) and
mem_inst_retired.latency_above_threshold_0 (NHM, WSM) that were having
their ldlat= value encoded as python's None.
Fixes: ffc606ada3d7 ("perf jevents: Add python converter script")
Reported-by: kernel test robot <yi1.lai@intel.com>
Closes: https://lore.kernel.org/oe-lkp/202611050801.67bb4af4-lkp@intel.com
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/pmu-events/jevents.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
index 080e04b51b8c..e083f7495e67 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -396,7 +396,7 @@ class JsonEvent:
event += f',{value}{canonicalize_value(jd[key])}'
if filter:
event += f',{filter}'
- if msr:
+ if msr and msrval:
event += f',{msr}{msrval}'
if self.desc and extra_desc:
self.desc += extra_desc
--
2.56.0.455.g6c5a503b38-goog
next reply other threads:[~2026-11-05 4:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 4:48 Ian Rogers [this message]
2026-11-05 5:42 ` Mi, Dapeng
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