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This connector is described as a fsl,aud-io-slot connector to expose a constrained subset of GPIO and clock resources to the add-on board using fixed electrical wiring. Also add required regulator, sound CPU DAI and I2C bus configuration to support IMX-AUD-IO on this base board. Signed-off-by: Chancel Liu --- arch/arm64/boot/dts/freescale/imx952-evk.dts | 67 +++++++++++++++++++- 1 file changed, 65 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx952-evk.dts b/arch/arm64/boot/dts/freescale/imx952-evk.dts index 047dfde20718..dbe0895b8965 100644 --- a/arch/arm64/boot/dts/freescale/imx952-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx952-evk.dts @@ -49,6 +49,16 @@ amp_mqs1: audio-amplifier { VCC-supply = <®_3p3v>; }; + aud_io_slot: connector { + compatible = "fsl,imx952-evk-aud-io", "fsl,imx95-19x19-evk-aud-io"; + #gpio-cells = <2>; + gpio-map = <0 0 &pcal6416 8 GPIO_ACTIVE_LOW>; + gpio-map-mask = <0xffffffff 0x0>; + gpio-map-pass-thru = <0x0 0xffffffff>; + #clock-cells = <1>; + clock-map = <0 &scmi_clk IMX952_CLK_SAI2>; + }; + bt_sco_codec: audio-codec-bt-sco { #sound-dai-cells = <1>; compatible = "linux,bt-sco"; @@ -190,13 +200,29 @@ reg_1p8v: regulator-1p8v { regulator-name = "+V1.8_SW"; }; - reg_vref_1v8: regulator-adc-vref { + aud_io_reg_1v8: reg_vref_1v8: regulator-adc-vref { compatible = "regulator-fixed"; regulator-name = "vref_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; + aud_io_reg_3v3: regulator-aud-io-3v3 { + compatible = "regulator-fixed"; + regulator-name = "aud-io-3v3"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + gpio = <&pcal6416 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + aud_io_reg_5v: regulator-aud-io-5v { + compatible = "regulator-fixed"; + regulator-name = "aud-io-5v"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + }; + reg_audio_pwr: regulator-audio-pwr { compatible = "regulator-fixed"; regulator-name = "audio-pwr"; @@ -409,7 +435,7 @@ i2c4_pcal6408: gpio@21 { }; }; -&lpi2c6 { +aud_io_i2c: &lpi2c6 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpi2c6>; @@ -556,6 +582,27 @@ &sai1 { status = "okay"; }; +aud_io_cpu: &sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + clocks = <&scmi_clk IMX952_CLK_BUSNETCMIX>, <&clk_dummy>, + <&scmi_clk IMX952_CLK_SAI2>, <&clk_dummy>, + <&clk_dummy>, <&scmi_clk IMX952_CLK_AUDIOPLL1>, + <&scmi_clk IMX952_CLK_AUDIOPLL2>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k"; + assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>, + <&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>, + <&scmi_clk IMX952_CLK_AUDIOPLL1>, + <&scmi_clk IMX952_CLK_AUDIOPLL2>, + <&scmi_clk IMX952_CLK_SAI2>; + assigned-clock-parents = <0>, <0>, <0>, <0>, + <&scmi_clk IMX952_CLK_AUDIOPLL1>; + assigned-clock-rates = <3932160000>, <3612672000>, + <393216000>, <361267200>, <12288000>; + fsl,sai-mclk-direction-output; + fsl,sai-asynchronous; +}; + &sai3 { assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>, <&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>, @@ -783,6 +830,22 @@ IMX952_PAD_SAI1_TXD0__AONMIX_TOP_GPIO1_IO_13 0x51e >; }; + pinctrl_sai2: sai2grp { + fsl,pins = < + IMX952_PAD_ENET2_MDIO__NETCMIX_TOP_SAI2_RX_BCLK 0x31e + IMX952_PAD_ENET2_MDC__NETCMIX_TOP_SAI2_RX_SYNC 0x31e + IMX952_PAD_ENET2_TD3__NETCMIX_TOP_SAI2_RX_DATA_0 0x31e + IMX952_PAD_ENET2_TD2__NETCMIX_TOP_SAI2_RX_DATA_1 0x31e + IMX952_PAD_ENET2_TXC__NETCMIX_TOP_SAI2_TX_BCLK 0x31e + IMX952_PAD_ENET2_TX_CTL__NETCMIX_TOP_SAI2_TX_SYNC 0x31e + IMX952_PAD_ENET2_RX_CTL__NETCMIX_TOP_SAI2_TX_DATA_0 0x31e + IMX952_PAD_ENET2_RXC__NETCMIX_TOP_SAI2_TX_DATA_1 0x31e + IMX952_PAD_ENET2_RD0__NETCMIX_TOP_SAI2_TX_DATA_2 0x31e + IMX952_PAD_ENET2_RD1__NETCMIX_TOP_SAI2_TX_DATA_3 0x31e + IMX952_PAD_ENET2_RD2__NETCMIX_TOP_SAI2_MCLK 0x31e + >; + }; + pinctrl_sai3: sai3grp { fsl,pins = < IMX952_PAD_GPIO_IO17__WAKEUPMIX_TOP_SAI3_MCLK 0x31e -- 2.50.1