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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36ca38fa273sm21151517eec.16.2026.11.05.09.59.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 09:59:54 -0800 (PST) Date: Thu, 5 Nov 2026 09:59:48 -0800 From: Jonathan Cameron To: Borislav Petkov Cc: "Santino Wang (=?utf-8?Q?=E7=8E=8B=E4=BF=8A=E5=82=91?=)" , "linux-edac@vger.kernel.org" , "Sidney Chang (=?utf-8?Q?=E5=BC=B5=E5=B1=A5?= =?utf-8?Q?=E5=B9=B3?=)" , AngeloGioacchino Del Regno , "Fred-WY Chen ( =?utf-8?Q?=E9=99=B3=E5=A8=81=E5=AE=87?=)" , "linux-kernel@vger.kernel.org" , "Light Chen (=?utf-8?Q?=E9=99=B3=E6=98=B1=E5=85=89?=)" , "linux-arm-kernel@lists.infradead.org" , "tony.luck@intel.com" , "linux-mediatek@lists.infradead.org" , "matthias.bgg@gmail.com" , "mchehab@kernel.org" , Arnab Layek Subject: Re: [RFC PATCH 00/11] soc: mediatek: add a DRAM ECC error handling driver Message-ID: <20261105095948.000013c0@oss.qualcomm.com> In-Reply-To: <20261105045321.GAauwLwdk2PSruRAcw@fat_crate.local> References: <20261102092334.138759-1-santino.wang@mediatek.com> <20261102123642.000044cf@oss.qualcomm.com> <20261102124434.00007741@oss.qualcomm.com> <78ce4a6ef441cb9836466e9ae5e72ffe21a88242.camel@mediatek.com> <20261105045321.GAauwLwdk2PSruRAcw@fat_crate.local> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTA1MDA3MSBTYWx0ZWRfX/j4meadgaz8a QMGghCheol3zY6owgIxAvqhHW2U4FHaleGdMhgoVv9eh65uk9nV4HzgT7vbMDMAgcOu1giAf5eX gtVnoWRgSMYKbaECcJBrKgctRrQrRYpOc01MwflaErQ6q8/1R33dUEi3iMe4jYfG6BskGjm5Gru QbJIND0KL4tLFEcr7rqwb2seycuUiQfFSUV2+ArBYO8LAgmikcnbLdgA/pyA2raSbLjQo6O3AiO n81LzjVljuW4c54xoprqzpjLn9M2wecj2i1eF/q+HB6bDFI+IBD+BdeS7NasSYkdZoLN9DcAZSn tLTwhw7i2wL37dggdrHQz2Xbc29pQx3RkIj1gAPrXVHYU33h/ZVI6l7g9QITbwmUKEXUiYQeRrS cCY2hrFP4/2yvAgGwVufKaRyC01YWoVhqA7xtzrkM28cl/wjiBzqB4Z5nvqTtHprPPLq/UZ1wNq qu5PkAt92MsySn/T7Tg== X-Proofpoint-GUID: jYoWVWzSVdZhRFRr54KuSLTjt7nOlcRy X-Proofpoint-Spam-Info: AW1haW4tMjYxMTA1MDA3MSBTYWx0ZWRfXzxuap76oWRoZ anQAoxXGPzBTKfLBTal5KdQctZQSTiQ3ZlLge2Hv/4gd8Zqke6i/WISGJTWJ/3xv01h1Ql5bgJV 6D4Fp/s+G31yg8SRvchJ/RJ2MORqHIQ= X-Proofpoint-ORIG-GUID: jYoWVWzSVdZhRFRr54KuSLTjt7nOlcRy X-Authority-Analysis: v=2.4 cv=WOXqzXsR c=1 sm=1 tr=0 ts=6aecc41c cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=xlvtQj9HLH9P9y80AtsA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-05_05,2026-11-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2611050071 On Wed, 4 Nov 2026 20:53:21 -0800 Borislav Petkov wrote: > On Thu, Nov 05, 2026 at 04:19:27AM +0000, Santino Wang (=E7=8E=8B=E4=BF= =8A=E5=82=91) wrote: > > Which existing interfaces would you recommend for obtaining retirement > > status from each memory owner? With that information available, can ite= ms > > 5=E2=80=937 be maintained in userspace, or would they require support f= rom an MTK > > driver? =20 >=20 > mm/memory-failure.c >=20 > Look how the others use it. >=20 > What you write above sounds like you need an EDAC driver which collects a= nd > reports errors. Look at examples in drivers/edac/ and there's some > documentation in Documentation/edac/. Perhaps ask AI too. >=20 > If the stuff you need is not there, you can extend the existing interface= s by > justifying the extensions properly. >=20 > But what you have - a completely separate RAS implementation, homegrown > somewhere else in the kernel doesn't fly. I'm actually wondering how you = even > managed to do this driver without *finding* all the RAS/EDAC glue we have= in > the kernel. Googling for it would've told you that there's something... >=20 I would add to this that if the standards don't work for you, consider chan= ging them. These days it isn't that hard to get ACPI changed and they have a ni= ce code first path so discussion can take place on kernel mailing lists to ref= ine the idea before going to the standards org. There is some overlap with things we will probably be proposing for ACPI in the next few weeks. I'll make sure to +CC everyone in this thread on that discussion. Inputs form Mediatek (and ideally Borislav, Tony etc!) should help refine that and avoid pitfalls that have made previous RAS ACPI stuff less than ideal. Jonathan > HTH. >=20