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Thu, 5 Nov 2026 12:14:29 +0000 (GMT) Received: from vega.samsungds.net (unknown [107.108.73.84]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20261105121426epsmtip1d622e1345811eb639be62820813704d9~lJSS_xApT3060130601epsmtip10; Thu, 5 Nov 2026 12:14:26 +0000 (GMT) From: Selvarasu Ganesan To: gregkh@linuxfoundation.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, peter.griffin@linaro.org, alim.akhtar@samsung.com, Thinh.Nguyen@synopsys.com, selvarasu.g@samsung.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: jh0801.jung@samsung.com, h10.kim@samsung.com, dh10.jung@samsung.com, akash.m5@samsung.com, hongpooh.kim@samsung.com, eomji.oh@samsung.com, shijie.cai@samsung.com, muhammed.ali@samsung.com, thiagu.r@samsung.com Subject: [PATCH v5 1/2] dt-bindings: usb: Add Samsung Exynos8855 DWC3 controller Date: Thu, 5 Nov 2026 17:44:00 +0530 Message-Id: <20261105121401.1661711-2-selvarasu.g@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20261105121401.1661711-1-selvarasu.g@samsung.com> X-CMS-MailID: 20261105121429epcas5p39d2113969a054d297cda76a67f309c14 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20261105121429epcas5p39d2113969a054d297cda76a67f309c14 References: <20261105121401.1661711-1-selvarasu.g@samsung.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list Add the Samsung Exynos8855 DWC3 binding using a flattened node representation, where the DWC3 controller is directly addressable rather than nested as a child node of a glue layer. This is the first Samsung Exynos binding using the flattened representation. Co-developed-by: Muhammed Ali Signed-off-by: Muhammed Ali Signed-off-by: Selvarasu Ganesan Reviewed-by: Krzysztof Kozlowski --- .../bindings/usb/samsung,exynos8855-dwc3.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml new file mode 100644 index 000000000000..664c26c1a9ca --- /dev/null +++ b/Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/samsung,exynos8855-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos8855 DWC3 USB controller + +maintainers: + - Krzysztof Kozlowski + - Selvarasu Ganesan + +description: + Describes the DWC3 USB controller block implemented on the Samsung + Exynos8855 SoC. + +properties: + compatible: + enum: + - samsung,exynos8855-dwc3 + + reg: + maxItems: 1 + + clocks: + items: + - description: Reference clock for SOF/ITP generation. + - description: Bus (APB) clock for register access. + + clock-names: + items: + - const: ref + - const: bus + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +allOf: + - $ref: snps,dwc3-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + usb@13200000 { + compatible = "samsung,exynos8855-dwc3"; + reg = <0x13200000 0x10000>; + clocks = <&usb_clk 0>, + <&usb_clk 1>; + clock-names = "ref", "bus"; + interrupts = ; + dr_mode = "peripheral"; + phys = <&usbdrd_phy 0>; + phy-names = "usb2-phy"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis-u2-freeclk-exists-quirk; + snps,gfladj-refclk-lpm-sel-quirk; + }; +... -- 2.17.1