From: Svyatoslav Ryhel <clamor95@gmail.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thierry Reding <thierry.reding@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Jessica Zhang <jesszhan0024@gmail.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
Svyatoslav Ryhel <clamor95@gmail.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v6 00/10] drm/tegra: Add support for Tegra20/Tegra30 8-bit CPU interface
Date: Thu, 5 Nov 2026 16:05:00 +0200 [thread overview]
Message-ID: <20261105140510.165165-1-clamor95@gmail.com> (raw)
The display controller in Tegra20/30 SoCs features an 8-bit SPI interface
that closely resembles the MIPI DBI Type B protocol and is referred to as
'8-bit CPU'.
Add MIPI DBI bus support along with 2 DBI Type B panels used in
LG Optimus 2X which work with the 8-bit CPU interface.
Convert rgb, dsi, hdmi and sor to use atomic versions of
drm_encoder_helper_funcs needed for bridge state requesting.
Refactor and expand DC header. Add DC parametrization options
needed for fine tuning by bridges. Make panel parsing by
tegra_output_probe() optional and document optional DSI port.
Add 8-bit CPU interface in form of a bridge linking to RGB port.
---
Changes in v2:
- convert enums in the dc header into definitions list
- add check in RGB if bridge_state is not NULL, if yes, use default flags
- inverted FLAG_PIXDATA_SAMPLE flag setup logic since default value is set to
be on NEGEDGE while v1 set default to be on POSEDGE
- 8bit-cpu schema renamed to dbi, removed compaible and set as DC child
- expanded list of required properties
- 8bit-cpu bridge remodelled into dbi interface as DC child
- improve gpio handling
- rework attach to get drvdata from parent
- add panel supplies description
- split panel driver into per-panel drivers
- get DBI interface from the patent directly
I have deliberately left GPIO parsing from device tree since it seems to
be the most convenient and mainstream method of working with GPIOs.
Changes in v3:
- rgb: fix default bus_flags to match original behavior
- dbi-schema: remove compatible from required props
remove dc@54200000 wrapper from example
restrict dbi nodes for tegra20/tegra30 only
- dbi: remove unused idx from tegra_dbi_priv
wrap dbi registration in dc with devm_add_action_or_reset()
separate dbi into separate object
export tegra_dc_commit() and trace_dc_readl()/dc_readl()
Changes in v4:
- reorder patches to avoid errors on checking dbi schema
- dbi schema renamed to nvidia,tegra20-dbi for consistency
- fix DC_DISP_V_PULSE0_POSITION_* > DC_DISP_V_PULSE1_POSITION_*
- add MODULE_ALIAS
- swap width and height in panels
- dropped use of init-sequence and gpios
- dbi driver reworked to use only DC to operate pins
Changes in v5:
- added commit modelling DBI bus (suggested by Mikko Perttunen)
- hitachi and lg panels converted to mipi_dbi_driver
- dc header refactored and completed
- added commit documenting DSI controller port
- added commit which converts drm_encoder_helper_funcs to use atomic
enable/disable
- added commit which makes panel parsing in tegra_output_probe() optional
- dbi command/data converted to enum
- dc com pins are now backed up into drivers private structure
- magic numbers replaced with pin defines
- dropped tegra_dc_readl() from tegra_dbi_pin_set
- tegra_dbi_pin_set() accepts boolean third argument
- tegra_dbi_write() second argument converted to use tegra_dbi_dc_signal enum
- used field_get() to extract pin value
- extended comment regarding init sequence
- nvidia,index > generic reg property
- adjusted tegra_dbi_atomic_enable() to properly handle shadowed registers
- switched to use of_drm_get_bridge_by_endpoint() since panels are auto-wrapped
into bridge now
- added support for mipi_dbi_host_ops
- added resource managed helper to register DBI device and provided to DC via
header
- dbi.o built with all other tegra drm files
Changes in v6:
- improved descriptions of new framework
- mipi dbi bus commit authorship was changed with Mikko's permission
- panel commits swapped with mipi dbi panel conversion commits
- fixed tegra_output_probe() for hdmi
- added CONFIG_DRM_MIPI_DBI select into CONFIG_DRM_TEGRA
- devm_drm_bridge_add() moved into bridge probe to avoid possible issues with
deferred panel probing
- setting LDC pin to V Pulse 1 moved before GPIO pin reconfiguration
- DC_CMD_STATE_ACCESS is set to read and write in tegra_dbi_atomic_disable()
- platform_driver_register() does not error out if driver is registered
Please, keep in mind that this series must be applied on top of
https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next)
---
Svyatoslav Ryhel (10):
drm: Add MIPI DBI bus support for MIPI DBI Type A and B
drm/panel: Convert Hitachi TX10D07VM0BAA to use MIPI DBI bus
drm/panel: Convert LG LH400WV3-SD04 to use MIPI DBI bus
drm/tegra: dc: Refactor and expand header
dt-bindings: display: tegra: Document Tegra20 DSI port
drm/tegra: Make panel parsing by tegra_output_probe() optional
drm/tegra: Convert to use atomic versions of drm_encoder_helper_funcs
drm/tegra: rgb: Parameterize configuration based on bus flags
dt-bindings: display: tegra: Document 8-bit CPU parallel interface
drm/tegra: Add support for 8-bit CPU interface
.../display/tegra/nvidia,tegra20-dbi.yaml | 113 +++
.../display/tegra/nvidia,tegra20-dc.yaml | 22 +
.../display/tegra/nvidia,tegra20-dsi.yaml | 6 +
drivers/gpu/drm/Makefile | 2 +-
drivers/gpu/drm/drm_mipi_dbi_bus.c | 256 ++++++
.../drm/panel/panel-hitachi-tx10d07vm0baa.c | 167 ++--
drivers/gpu/drm/panel/panel-lg-lh400wv3.c | 103 +--
drivers/gpu/drm/tegra/Kconfig | 1 +
drivers/gpu/drm/tegra/Makefile | 1 +
drivers/gpu/drm/tegra/dbi.c | 576 ++++++++++++
drivers/gpu/drm/tegra/dc.c | 15 +-
drivers/gpu/drm/tegra/dc.h | 859 +++++++++++-------
drivers/gpu/drm/tegra/drm.h | 2 +-
drivers/gpu/drm/tegra/dsi.c | 22 +-
drivers/gpu/drm/tegra/hdmi.c | 22 +-
drivers/gpu/drm/tegra/output.c | 52 +-
drivers/gpu/drm/tegra/rgb.c | 72 +-
drivers/gpu/drm/tegra/sor.c | 20 +-
include/drm/drm_mipi_dbi_bus.h | 103 +++
19 files changed, 1851 insertions(+), 563 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dbi.yaml
create mode 100644 drivers/gpu/drm/drm_mipi_dbi_bus.c
create mode 100644 drivers/gpu/drm/tegra/dbi.c
create mode 100644 include/drm/drm_mipi_dbi_bus.h
--
2.53.0
next reply other threads:[~2026-11-05 14:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 14:05 Svyatoslav Ryhel [this message]
2026-11-05 14:05 ` [PATCH v6 01/10] drm: Add MIPI DBI bus support for MIPI DBI Type A and B Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 02/10] drm/panel: Convert Hitachi TX10D07VM0BAA to use MIPI DBI bus Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 03/10] drm/panel: Convert LG LH400WV3-SD04 " Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 04/10] drm/tegra: dc: Refactor and expand header Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 05/10] dt-bindings: display: tegra: Document Tegra20 DSI port Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 06/10] drm/tegra: Make panel parsing by tegra_output_probe() optional Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 07/10] drm/tegra: Convert to use atomic versions of drm_encoder_helper_funcs Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 08/10] drm/tegra: rgb: Parameterize configuration based on bus flags Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 09/10] dt-bindings: display: tegra: Document 8-bit CPU parallel interface Svyatoslav Ryhel
2026-11-05 22:58 ` Rob Herring (Arm)
2026-11-05 14:05 ` [PATCH v6 10/10] drm/tegra: Add support for 8-bit CPU interface Svyatoslav Ryhel
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