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Thu, 05 Nov 2026 13:24:16 -0800 (PST) Received: from zippy.localdomain ([73.62.185.64]) by smtp.gmail.com with ESMTPSA id 5614622812f47-567a9ef58b1sm5349897b6e.3.2026.11.05.13.24.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 13:24:16 -0800 (PST) From: Alex Elder To: bhelgaas@google.com, robh@google.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: daniel@riscstar.com, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrea della Porta Subject: [PATCH v4 1/2] PCI: of: introduce of_pci_build_prop_ranges() Date: Thu, 5 Nov 2026 15:24:11 -0600 Message-ID: <20261105212412.591931-2-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261105212412.591931-1-elder@riscstar.com> References: <20261105212412.591931-1-elder@riscstar.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Move the bulk of what happens inside of_pci_prop_ranges() into a helper function that builds up the value to be passed to of_changeset_add_prop_u32_array(). This helper will be used in the next commit to build the ranges property for a statically-defined PCI endpoint devicetree node when it has a "pci-ep-bus" sub-node. Tested-by: Andrea della Porta Signed-off-by: Alex Elder --- drivers/pci/of_property.c | 126 +++++++++++++++++++++++++------------- 1 file changed, 83 insertions(+), 43 deletions(-) diff --git a/drivers/pci/of_property.c b/drivers/pci/of_property.c index 702675672fbc5..b202f45b3660b 100644 --- a/drivers/pci/of_property.c +++ b/drivers/pci/of_property.c @@ -8,6 +8,10 @@ #include #include #include +#include +#include +#include + #include "pci.h" #define OF_PCI_ADDRESS_CELLS 3 @@ -104,60 +108,96 @@ static int of_pci_prop_bus_range(struct pci_dev *pdev, ARRAY_SIZE(bus_range)); } -static int of_pci_prop_ranges(struct pci_dev *pdev, struct of_changeset *ocs, - struct device_node *np) +/* + * Build a "ranges" property value that defines the mapping between + * child and parent PCI address space for each of the given PCI + * device's resources. + * + * Returns a dynamically allocated array of u32 devicetree cells, or + * a null pointer if allocation fails. The cell array is built as a + * of_pci_prop_ranges structure consisting of 8 32-bit cells in host + * byte order. It is suitable for use as the value of a PCI device + * node "ranges" property passed to of_changeset_add_prop_u32_array(). + * The total number of cells in the array is returned in *count. + * + * Caller is responsible for ensuring the returned pointer gets freed. + */ +static u32 *of_pci_build_prop_ranges(struct pci_dev *pdev, u32 *count) { - struct of_pci_range_entry *rp; + bool bridge_device = pci_is_bridge(pdev); + struct of_pci_range_entry *entries; + struct of_pci_range_entry *ep; + u32 resource_count = 0; struct resource *res; - int i, j, ret; u32 flags, num; - u64 val64; + u32 first; + u32 i; - if (pci_is_bridge(pdev)) { + if (bridge_device) { + first = PCI_BRIDGE_RESOURCES; num = PCI_BRIDGE_RESOURCE_NUM; - res = &pdev->resource[PCI_BRIDGE_RESOURCES]; } else { + first = PCI_STD_RESOURCES; num = PCI_STD_NUM_BARS; - res = &pdev->resource[PCI_STD_RESOURCES]; } - rp = kzalloc_objs(*rp, num); - if (!rp) + /* First count how many resources will get a range property */ + res = pci_resource_n(pdev, first); + for (i = 0; i < num; i++, res++) + if (resource_size(res) && !of_pci_get_addr_flags(res, &flags)) + resource_count++; + + entries = kzalloc_objs(*entries, resource_count); + if (!entries) + return NULL; + + ep = entries; + res = pci_resource_n(pdev, first); + for (i = 0; i < num; i++, res++) { + u64 size = resource_size(res); + + if (!size || of_pci_get_addr_flags(res, &flags)) + continue; + + /* Record the size in the range entry */ + ep->size[0] = upper_32_bits(size); + ep->size[1] = lower_32_bits(size); + + /* Record the parent bus address from the resource */ + of_pci_set_address(pdev, ep->parent_addr, + pci_bus_address(pdev, first + i), + flags, false); + + /* + * For a bridge device, the child address matches the + * parent address (including its flags cell). For an + * endpoint device, the (flags) cell contains the BAR + * number, and the two address cells are zero. + */ + if (bridge_device) + memcpy(ep->child_addr, ep->parent_addr, + sizeof(ep->child_addr)); + else + ep->child_addr[0] = i; + + ep++; + } + *count = resource_count * sizeof(*ep) / sizeof(u32); + + return (u32 *)entries; +} + +static int of_pci_prop_ranges(struct pci_dev *pdev, struct of_changeset *ocs, + struct device_node *np) +{ + u32 *value; + u32 count; + + value = of_pci_build_prop_ranges(pdev, &count); + if (!value) return -ENOMEM; - for (i = 0, j = 0; j < num; j++) { - if (!resource_size(&res[j])) - continue; - - if (of_pci_get_addr_flags(&res[j], &flags)) - continue; - - val64 = pci_bus_address(pdev, &res[j] - pdev->resource); - of_pci_set_address(pdev, rp[i].parent_addr, val64, flags, - false); - if (pci_is_bridge(pdev)) { - memcpy(rp[i].child_addr, rp[i].parent_addr, - sizeof(rp[i].child_addr)); - } else { - /* - * For endpoint device, the lower 64-bits of child - * address is always zero. - */ - rp[i].child_addr[0] = j; - } - - val64 = resource_size(&res[j]); - rp[i].size[0] = upper_32_bits(val64); - rp[i].size[1] = lower_32_bits(val64); - - i++; - } - - ret = of_changeset_add_prop_u32_array(ocs, np, "ranges", (u32 *)rp, - i * sizeof(*rp) / sizeof(u32)); - kfree(rp); - - return ret; + return of_changeset_add_prop_u32_array(ocs, np, "ranges", value, count); } static int of_pci_prop_reg(struct pci_dev *pdev, struct of_changeset *ocs, -- 2.53.0