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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b25e4a63f6sm389041c88.9.2026.11.05.15.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 15:51:38 -0800 (PST) From: Anusha Arun Nandi To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Manivannan Sadhasivam , Bryan O'Donoghue Cc: gjorgji.rosikopulos@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, jigarkumar.zala@oss.qualcomm.com, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 0/4] phy: qcom-mipi-csi2: Add D-PHY support for sa8775p, qcs8300 and sc7280 Date: Thu, 5 Nov 2026 15:51:33 -0800 Message-Id: <20261105235137.2635442-1-anusha.nandi@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMTA1MDA5NSBTYWx0ZWRfX4c35qTlvo80O fII9xPPMdrn9JvQ/zhf8Yyt4Fmqd3aurQXvXE6w19XZf1IxNpW9IaSaybl3DhQn0HncyY5KDDD9 R4UVNW/QzC81J0RwkgodroOWSkINSEg= X-Proofpoint-GUID: hX1w9Uqon0gjkPHPJlj_EPPmG2E7Qicd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTA1MDA5NSBTYWx0ZWRfX5EjopobZecnB VkS5jj7XruyQXzLHDwVecnlIsZJo115CUim1BRWt1dfW5PgbMU33nLPTchAsrPojnHHvpmrJBmG cB0/jZuWbc11AVMsRTr0U0Niy2C6Ro86s+iuiwBdrh0rYfohGTyCjnKaGtIKXUOmfxaWm/1hA8h oDJXNmt/1yyZZMf8ZIMjhCeB/VEu9B9Y0IUQHiyaDZi4abJx/jr7370MWd4V1cfuIoh3SsjStTy BNUIlEx4lNAT1nGu2LlXpu4zolfqr+YT3vCQLS3heSZRdXhxMBImx+R3K9QUxUP+ej0YLVw2lgf 5yZ/ruKx7mDA+R4viZUo+NMM4IYTHcZDp3DOqXyRfnuuhWmflKyj6p4NAudqkzgiLMQrcBzSA5w GJAiE7TQgc3hjaAAXs5qxN0Yl6ztx7fXXCJD3siAHeAZ5PBODwAGzBz7o/HQCkVNadERb9Q6lL2 TZoJZiOHVJf8jWUSMXQ== X-Proofpoint-ORIG-GUID: hX1w9Uqon0gjkPHPJlj_EPPmG2E7Qicd X-Authority-Analysis: v=2.4 cv=ZIZCCn7b c=1 sm=1 tr=0 ts=6aed168c cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=iQrEevU3y8pT7K306hwA:9 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-05_06,2026-11-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 suspectscore=0 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611050095 This series extends the generic Qualcomm MIPI CSI2 PHY driver (drivers/phy/qualcomm/phy-qcom-mipi-csi2-*) with three additional CSIPHY variants: SA8775P, QCS8300 and SC7280. The driver currently only supports x1e80100; these SoCs let CAMSS consume the CSIPHY through the common PHY framework instead of the CSIPHY logic embedded in the legacy in-tree CAMSS driver. QCS8300 shares the same CSIPHY D-PHY hardware as SA8775P, so it does not need its own of_device_id entry: the qcom,csi2-phy.yaml binding declares "qcom,sa8775p-csi2-phy" as QCS8300's fallback compatible, and QCS8300 CSIPHY nodes bind through patch 3's existing "qcom,sa8775p-csi2-phy" match entry. Tested on sa8775p, qcs8300 and sc7280. Changes in v3: - Patch 1 (binding): renamed vdda-phy-supply/vdda-pll-supply to vdda-hs-supply/vdda-lp-supply, and restored the DPHY split-mode port@0 definition (two endpoints, lane-count constraint) that was dropped from the combined schema, cloning it from qcom,x1e80100-csi2-phy.yaml instead. - Dropped "phy: qcom-mipi-csi2: Make timer and OPP clock names configurable": no SoC this driver supports actually needs different clock names, so the patch had no real effect. - Patch 2 ("Make OPP table optional") no longer depends on the dropped patch's configurable opp_clk_name field; it now adds a plain no_opp bool instead, with "timer"/"core" kept as hardcoded literals. - Patches 3 and 4 (sa8775p, sc7280) dropped their now-unnecessary timer_clk_name/opp_clk_name overrides, and renamed their vdda-phy/vdda-pll supplies to vdda-hs/vdda-lp to match patch 1. Link to v2: https://lore.kernel.org/all/20261103214105.3605181-1-anusha.nandi@oss.qualcomm.com/ Changes in v2: - Dropped "phy: qcom-mipi-csi2: fix -EEXIST probe failure on single power-domain SoCs" from this series; posted standalone instead, renamed to "Add support for single power-domain SoCs" since it adds a case rather than fixing a bug. - Squashed the standalone qcom,sa8775p-csi2-phy.yaml/qcom,qcs8300 enum addition/qcom,sc7280-csi2-phy.yaml schemas into one shared qcom,csi2-phy.yaml, modelled as a oneOf compatible list instead of one file per SoC. - Dropped the standalone "qcom,qcs8300-csi2-phy" of_device_id entry; QCS8300 now binds through the sa8775p match entry via the binding's fallback compatible instead, since the two SoCs are fully hardware compatible. - Squashed the separate "Add qcs8300 CSI2 PHY support" patch into "Add sa8775p D-PHY support" to match. Link to v1: https://lore.kernel.org/all/20261016235502.2274268-1-anusha.nandi@oss.qualcomm.com/ Anusha Arun Nandi (4): dt-bindings: phy: qcom: Add common qcom,csi2-phy phy: qcom-mipi-csi2: Make OPP table optional phy: qcom-mipi-csi2: Add sa8775p D-PHY support phy: qcom-mipi-csi2: Add sc7280 D-PHY provider .../bindings/phy/qcom,csi2-phy.yaml | 201 +++++++++++++++ .../qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c | 228 +++++++++++++++++- .../phy/qualcomm/phy-qcom-mipi-csi2-core.c | 74 +++--- drivers/phy/qualcomm/phy-qcom-mipi-csi2.h | 5 + 4 files changed, 474 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,csi2-phy.yaml Best regards, -- Anusha Arun Nandi -- -- 2.34.1