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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cdb70a04a39sm118179a12.15.2026.11.05.19.03.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 19:03:37 -0800 (PST) From: Kyle Hsieh Date: Fri, 06 Nov 2026 11:08:02 +0800 Subject: [PATCH 1/3] ARM: dts: aspeed: ventura2: Add LTC2305 ADCs X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261106-ventura2-dts-update-v1-1-b085ece9bf57@gmail.com> References: <20261106-ventura2-dts-update-v1-0-b085ece9bf57@gmail.com> In-Reply-To: <20261106-ventura2-dts-update-v1-0-b085ece9bf57@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Ryan Chen , Billy Tsai Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Kyle Hsieh X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1757; i=kylehsieh1995@gmail.com; h=from:subject:message-id; bh=s3+YaNI0kXS1WHGDFc6jVaitSFXgSkUDG8m8Ajnq+tw=; b=owEBbQGS/pANAwAKAaWDQrcJVsSBAcsmYgBq7USVrNYo936MKfY8QZ8ByY59Ccq89oZ8md29i fRH6E9D4z+JATMEAAEKAB0WIQTJHsaNZOdY+THGqJelg0K3CVbEgQUCau1ElQAKCRClg0K3CVbE gQTMCACAEQvBIE/8WEFrZZ9u96QoYyPrhnfijSAw8ZPvSKASOXgKbhwNEy6a1B/bZCP2Qq7fbB/ rwWGG3+VsplhWYGMjCzV/5hJHtPbkUjMNw6RqLytydlwFNlM4/MMJ5BloWHIrmm9Q2gVI8onIvU E/rkDcrss9iLgt5cFCwV0IJdPZPIic6Nb5OgGMoqmQ21pRTiu6GxOY49zMJOihDbgtd9vVGv6Ex /hkkon9DJfi7gKUgU4xHoo7nyDDP5c3jM2FfB6oMP/hm+vs2LuExbc7VtXj+QKd+M7BTBqPoiR4 tZ1dplLGWvitZI8JDLtX0gtr1PpREtIggD79yh5gb+MsgISe X-Developer-Key: i=kylehsieh1995@gmail.com; a=openpgp; fpr=C91EC68D64E758F931C6A897A58342B70956C481 Ventura2 has three LTC2305 2-channel 12-bit ADCs: one behind channel 2 of the PCA9548 mux on I2C bus 0, and two on I2C bus 3 at addresses 0x08 and 0x09. The bus 3 ADCs read the valve voltages. Describe the ADCs and expose the bus 3 channels through iio-hwmon so the voltages are reported as hwmon sensors. The ADCs use their internal 4.096V reference, so no vref-supply is described. Signed-off-by: Kyle Hsieh --- .../dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts index f3dbdece3076..50e652cc37a1 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts @@ -190,7 +190,8 @@ iio-hwmon { io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, - <&adc1 2>; + <&adc1 2>, + <&adc_op_fb1 0>, <&adc_op_fb1 1>, <&adc_op_fb2 0>; }; leds { @@ -392,6 +393,12 @@ i2c0mux0ch2: i2c@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; + + adc@8 { + compatible = "lltc,ltc2305"; + reg = <0x08>; + #io-channel-cells = <1>; + }; }; i2c0mux0ch3: i2c@3 { @@ -583,6 +590,18 @@ &i2c3 { status = "okay"; + adc_op_fb1: adc@8 { + compatible = "lltc,ltc2305"; + reg = <0x08>; + #io-channel-cells = <1>; + }; + + adc_op_fb2: adc@9 { + compatible = "lltc,ltc2305"; + reg = <0x09>; + #io-channel-cells = <1>; + }; + dac@c { compatible = "adi,ad5612"; reg = <0x0c>; -- 2.34.1