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Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by TY2PEPF0000AB86.mail.protection.outlook.com (10.167.253.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.615.4 via Frontend Transport; Fri, 6 Nov 2026 01:35:23 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id D588640920E8; Fri, 6 Nov 2026 09:35:22 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com, sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com, linux-clk@vger.kernel.org, joakim.zhang@cixtech.com Subject: [PATCH v3 5/5] arm64: dts: cix: Add the Sky1 AUDSS DMA-350 integration Date: Fri, 6 Nov 2026 09:35:20 +0800 Message-ID: <20261106013520.1134450-6-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261106013520.1134450-1-Jelly.Jia@cixtech.com> References: <20261106013520.1134450-1-Jelly.Jia@cixtech.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY2PEPF0000AB86:EE_|KUYPR06MB8604:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 14c296e6-33c5-4ce7-2a7c-08df3ba63a76 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|7416014|36860700016|376014|1800799024|82310400026|56012099006|261026121527099003|261026140227099003|261021123027099003|261102123227099003|261022105027099003|261021121427099003|261009223027099003|261028144727099003|10067099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: WwFMagnphGl6wQrzRziw1VBLS+MbnxZcNZ5DsZAuby2tn66RelII7wEIs8wmNdclWRZHYRPMQuWvvPLvpc/x4xgcWUCIOQ9ISgn3i65ckE1z5Nqib73N/FTpdx+0aGfZqa9c1GPWDJdO2E62pnHWpM7DzJgp78XVrW2I7z/0YtaCdKkSRrI1ot3vGIhx1ja2Sc9R/uq/dcqdAvDkdH+Yiry8U2MnXYk0fr20UlXQS+zZq0sUpXN3FukCxqKFvex/pcRYydMjl7Za50N1yhkj3Mvxg3CzWgJ9+Qu16cWpeDkYQpXQ5/t8IDIvZitAvpvIAR/TJmo0tLtd6tc0VBaWjiAxdV7LfAwysRmyMlqwxHSRqfHn6gXzkkuADUWwffX1LINrUGpXd30dxgireRq1SLX/4LkVHYT4ZRE2TKr1muqt5CvaU60xJg+fXAJMkJoQ X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2026 01:35:23.9260 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 14c296e6-33c5-4ce7-2a7c-08df3ba63a76 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: TY2PEPF0000AB86.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: KUYPR06MB8604 The AUDSS DMA-350 master sees the CPU physical peripheral window at 0x07010000 through DMA address 0x20000000, and DRAM at CPU physical 0xc0000000 through DMA address 0x30000000. Describe the 1 MiB peripheral window and 512 MiB DRAM window with dma-ranges on the parent bus, and add the controller's clock and reset. Identify the Sky1 integration with its compatible followed by the generic arm,dma-350 fallback. Route the eight channel interrupts through the AUDSS CRU, whose AP gates combine them onto GIC SPI 230. List child interrupts in hardware channel order and set dma-channel-mask to 0xff to make all eight channels available to Linux. Signed-off-by: Jelly Jia --- arch/arm64/boot/dts/cix/sky1.dtsi | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi index 5399eebe8eee..513f56eb1b6a 100644 --- a/arch/arm64/boot/dts/cix/sky1.dtsi +++ b/arch/arm64/boot/dts/cix/sky1.dtsi @@ -588,17 +588,41 @@ mbox_pm2ap: mailbox@65a0080 { cix,mbox-dir = "rx"; }; + audss-dma-bus { + compatible = "simple-bus"; + ranges; + #address-cells = <2>; + dma-ranges = <0x0 0x20000000 0x0 0x07010000 0x0 0x00100000>, + <0x0 0x30000000 0x0 0xc0000000 0x0 0x20000000>; + #size-cells = <2>; + + audss_dmac: dma-controller@7010000 { + compatible = "cix,sky1-dma350", "arm,dma-350"; + reg = <0x0 0x07010000 0x0 0x10000>; + clocks = <&audss_cru CLK_DMAC_AXI>; + #dma-cells = <1>; + dma-channel-mask = <0xff>; + interrupt-parent = <&audss_cru>; + interrupts = <0>, <1>, <2>, <3>, + <4>, <5>, <6>, <7>; + resets = <&audss_cru AUDSS_DMAC_SW_RST>; + }; + }; + audss_cru: clock-controller@7110000 { compatible = "cix,sky1-audss-cru"; reg = <0x0 0x07110000 0x0 0x10000>; #clock-cells = <1>; - #reset-cells = <1>; clocks = <&scmi_clk CLK_TREE_AUDIO_CLK0>, <&scmi_clk CLK_TREE_AUDIO_CLK2>, <&scmi_clk CLK_TREE_AUDIO_CLK4>, <&scmi_clk CLK_TREE_AUDIO_CLK5>; clock-names = "x8k", "x11k", "sys", "48m"; + #interrupt-cells = <1>; + interrupt-controller; + interrupts = ; power-domains = <&smc_devpd SKY1_PD_AUDIO>; + #reset-cells = <1>; resets = <&s5_syscon SKY1_AUDIO_HIFI5_NOC_RESET_N>; }; -- 2.54.0