From: Jason Gunthorpe <jgg@nvidia.com>
To: Ankit Agrawal <ankita@nvidia.com>
Cc: Richard Cheng <icheng@nvidia.com>,
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Subject: Re: [RFC PATCH v2 3/5] PCI/TSM: Derive the coherent-range IPA from CXL
Date: Fri, 6 Nov 2026 10:26:17 -0400 [thread overview]
Message-ID: <20261106142617.GB770409@nvidia.com> (raw)
In-Reply-To: <SAWPR12MB9992676C0AD7255BC8D9A6BD4AB0762@SAWPR12MB999267.namprd12.prod.outlook.com>
On Fri, Nov 06, 2026 at 12:38:35PM +0000, Ankit Agrawal wrote:
> >>> +
> >>> + reporting_bar_base = tsm_offset &
> >>> + ~((u64)range_len(&window) - 1);
> >>
> >> Hi Ankit,
> >>
> >> HDM decoder window can have non-power-of-2 sizes, why do we assume a power-of-2 size for
> >> coherent window?
> >
> > Hi Richard, yeah the region base calculation needs to be updated
> > to correctly determine the CXL region base for the
> > non-powerof2 sizes.
>
> Just to add, IMO determining the base IPA of the CXL region using the
> interface report does not look straight forward for this case. Trying to
> figure out a proper solution. Missed to mention this as an open in the
> cover letter.
This is the same old problem, PCI SIG messed up the interface report
so it is not usable by the guest.
The pow-2 thing was a work around to avoid that, and it still works
fine for CXL.
CXL's non-pow-2 doesn't change anything. The TSM still would compute
the pow-2 starting point and use that when applying the
offset. Meaning it rounds down the CXL window start to the nearest
pow2 alignment, then uses that to set the offset bits.
Linux makes the same calculation to strip the offset bits.
The real fix was to have the interface report include the starting
offset, but that didn't happen, and it is too late now, so oh well.
Jason
next prev parent reply other threads:[~2026-11-06 14:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 15:29 [RFC PATCH v2 0/5] PCI/TSM: Resolve TDISP coherent (CXL) ranges from precommitted HDM decoders Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 1/5] PCI/TSM: Create MMIO descriptors via TDISP Report Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 2/5] PCI/CXL: Populate and insert/remove pdev->coh_resource[] Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 3/5] PCI/TSM: Derive the coherent-range IPA from CXL Ankit Agrawal
2026-11-06 10:06 ` Richard Cheng
2026-11-06 12:16 ` Ankit Agrawal
2026-11-06 12:38 ` Ankit Agrawal
2026-11-06 14:26 ` Jason Gunthorpe [this message]
2026-11-05 15:29 ` [RFC PATCH v2 4/5] PCI/TSM: Support multiple coherent ranges via coh_idx Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 5/5] cxl: Invalidate cached coherent range when Normalized Addressing is detected Ankit Agrawal
2026-11-06 10:19 ` Richard Cheng
2026-11-06 12:22 ` Ankit Agrawal
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