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Fri, 6 Nov 2026 17:34:39 +0100 From: Antonio Borneo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Russell King , Wim Van Sebroeck , Guenter Roeck , , , , CC: Antonio Borneo , , =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Amelie Delaunay Subject: [PATCH v3 10/13] arm64: dts: st: add iwdg1 and iwdg2 support to stm32mp211 Date: Fri, 6 Nov 2026 17:34:26 +0100 Message-ID: <20261106163429.618392-11-antonio.borneo@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261106163429.618392-1-antonio.borneo@foss.st.com> References: <20261106163429.618392-1-antonio.borneo@foss.st.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: STKCAS1NODE1.st.com (10.75.128.134) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MI3PEPF0000847F:EE_|MI9PR10MB992209:EE_ X-MS-Office365-Filtering-Correlation-Id: 2b500422-65e0-4562-59be-08df3c23db75 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|7416014|23010399003|1800799024|22082099003|18002099003|921020|11063799006|56012099006|10067099003|261102123227099003|261021121427099003|261009223027099003|261026121527099003; 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Signed-off-by: Clément Le Goffic Signed-off-by: Antonio Borneo --- arch/arm64/boot/dts/st/stm32mp211.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi index 4bfd58b26b51b..7ad1c3c304dea 100644 --- a/arch/arm64/boot/dts/st/stm32mp211.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp211.dtsi @@ -110,6 +110,26 @@ usart2: serial@400e0000 { access-controllers = <&rifsc 32>; status = "disabled"; }; + + iwdg1: watchdog@44010000 { + compatible = "st,stm32mp1-iwdg"; + reg = <0x44010000 0x0 0x400>; + interrupts = ; + clocks = <&rcc CK_BUS_IWDG1>, <&scmi_clk CK_SCMI_LSI>; + clock-names = "pclk", "lsi"; + access-controllers = <&rifsc 100>; + status = "disabled"; + }; + + iwdg2: watchdog@44020000 { + compatible = "st,stm32mp1-iwdg"; + reg = <0x44020000 0x0 0x400>; + interrupts = ; + clocks = <&rcc CK_BUS_IWDG2>, <&scmi_clk CK_SCMI_LSI>; + clock-names = "pclk", "lsi"; + access-controllers = <&rifsc 101>; + status = "disabled"; + }; }; bsec: efuse@44000000 { -- 2.34.1