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Fri, 6 Nov 2026 17:34:35 +0100 From: Antonio Borneo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Russell King , Wim Van Sebroeck , Guenter Roeck , , , , CC: Antonio Borneo , , =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Amelie Delaunay Subject: [PATCH v3 03/13] watchdog: stm32_iwdg: add pretimeout support for iwdg v4.0 Date: Fri, 6 Nov 2026 17:34:19 +0100 Message-ID: <20261106163429.618392-4-antonio.borneo@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261106163429.618392-1-antonio.borneo@foss.st.com> References: <20261106163429.618392-1-antonio.borneo@foss.st.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: STKCAS1NODE1.st.com (10.75.128.134) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB1PEPF000509FE:EE_|AS8PR10MB7449:EE_ X-MS-Office365-Filtering-Correlation-Id: f2356634-c36c-4802-17cd-08df3c23d896 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|7416014|376014|1800799024|82310400026|36860700016|921020|11063799006|261021121427099003|56012099006|261021123027099003|261102123227099003|261026121527099003|261009223027099003|10067099003|22082099003|18002099003; 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Use the interrupt clear register (ICR) to acknowledge pretimeout interrupts on hardware version 4.0 and later. Add a reg_set() helper to improve code readability. Signed-off-by: Antonio Borneo --- drivers/watchdog/stm32_iwdg.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c index ce3e1f96ef50a..6121c23889655 100644 --- a/drivers/watchdog/stm32_iwdg.c +++ b/drivers/watchdog/stm32_iwdg.c @@ -30,6 +30,7 @@ #define IWDG_SR 0x0C /* Status Register */ #define IWDG_WINR 0x10 /* Windows Register */ #define IWDG_EWCR 0x14 /* Early Wake-up Register */ +#define IWDG_ICR 0x18 /* Interrupt Clear Register */ #define IWDG_VERR 0x3F4 /* Version Register */ /* IWDG_KR register bit mask */ @@ -55,11 +56,14 @@ #define EWCR_EWIC BIT(14) /* Watchdog early interrupt acknowledge */ #define EWCR_EWIE BIT(15) /* Watchdog early interrupt enable */ +#define ICR_EWIC BIT(15) /* Watchdog early interrupt acknowledge */ + /* IWDG_VERR register mask */ #define VERR_MASK GENMASK(7, 0) /* IWDG Compatibility */ #define ONF_MIN_VER 0x31 +#define ICR_MIN_VER 0x40 /* set timeout to 100000 us */ #define TIMEOUT_US 100000 @@ -103,6 +107,15 @@ static inline void reg_write(void __iomem *base, u32 reg, u32 val) writel_relaxed(val, base + reg); } +static inline void reg_set(void __iomem *base, u32 reg, u32 set) +{ + u32 val; + + val = readl_relaxed(base + reg); + val |= set; + writel_relaxed(val, base + reg); +} + static int stm32_iwdg_start(struct watchdog_device *wdd) { struct stm32_iwdg *wdt = watchdog_get_drvdata(wdd); @@ -194,11 +207,11 @@ static irqreturn_t stm32_iwdg_isr(int irq, void *wdog_arg) { struct watchdog_device *wdd = wdog_arg; struct stm32_iwdg *wdt = watchdog_get_drvdata(wdd); - u32 reg; - reg = reg_read(wdt->regs, IWDG_EWCR); - reg |= EWCR_EWIC; - reg_write(wdt->regs, IWDG_EWCR, reg); + if (wdt->hw_version >= ICR_MIN_VER) + reg_write(wdt->regs, IWDG_ICR, ICR_EWIC); + else + reg_set(wdt->regs, IWDG_EWCR, EWCR_EWIC); watchdog_notify_pretimeout(wdd); -- 2.34.1