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Fri, 6 Nov 2026 17:34:38 +0100 From: Antonio Borneo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Russell King , Wim Van Sebroeck , Guenter Roeck , , , , CC: Antonio Borneo , , =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Amelie Delaunay Subject: [PATCH v3 08/13] ARM: dts: stm32: enable arm smc watchdog on stm32mp15x scmi boards Date: Fri, 6 Nov 2026 17:34:24 +0100 Message-ID: <20261106163429.618392-9-antonio.borneo@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261106163429.618392-1-antonio.borneo@foss.st.com> References: <20261106163429.618392-1-antonio.borneo@foss.st.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: STKCAS1NODE1.st.com (10.75.128.134) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MI3PEPF0000847F:EE_|MA9PR10MB922269:EE_ X-MS-Office365-Filtering-Correlation-Id: 8a6b41f8-54f0-4556-8c06-08df3c23da0d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|23010399003|7416014|1800799024|22082099003|10067099003|18002099003|921020|56012099006|11063799006|261026121527099003|261102123227099003|261021121427099003|261021123027099003|261021135927099003|261009223027099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MFMK6xmcSrGFp/4nVA5LKwZzWmiPPyzFpS9NGWSJLSwQy+oqEnyS27u3+zhRPwlxMHHFKEYZcyHKQ8O5ABWIUHldUlcE8BCVS3lQOCgDZX3BHB5sCsKN/SbXWbcgdOopyRxMFQ4emkBgApxlo0wddoRBKgMOvNAilPHBepp2y8DAOkqyfT0kvz+aOcpJWYgPwKAkBXoyr1IrBuDV6OvglQdYxWwGCKKKwVb4wXnH9tdVDEgHuxn6DreGK0LsOTTuZTFbIgU6ltzXz+r/H1FbEBWlbVE6Z93/bA1yuuSKoKCLYjshM3uwHwqkCYcQKducqVeYZEB+SstFctxPi6U5BxmntapTlJ323ODEOxP0bSTBrfgq2/jfgbAEwAfHlMV0IUz75zB5sN38zLcgrDT5zfEwTnrU1XRgYNW1c/p8UvvvOqIqJ8+WtAfIIZ2GJMYf X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2026 16:34:38.9344 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a6b41f8-54f0-4556-8c06-08df3c23da0d X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: MI3PEPF0000847F.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MA9PR10MB922269 From: Amelie Delaunay On STM32MP15x SCMI boards, IWDG1 is secure and monitored by OP-TEE. Enable the arm,smc-wdt node on ST SCMI board variants so that Linux can control the secure watchdog through SMC calls. With two watchdogs now enabled on ST STM32MP2xx boards, assign the watchdog0 alias to the ARM SMC watchdog that may have been started by an earlier boot stage. This allows userspace to identify and ping the appropriate watchdog. Signed-off-by: Amelie Delaunay Signed-off-by: Antonio Borneo --- arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts | 9 +++++++++ arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts | 9 +++++++++ arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 9 +++++++++ arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts | 9 +++++++++ 4 files changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts index 53e40e2f776b7..2f4d212de3e9c 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts @@ -13,6 +13,10 @@ / { model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board"; compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157"; + aliases { + watchdog0 = &arm_wdt; + }; + reserved-memory { optee@de000000 { reg = <0xde000000 0x2000000>; @@ -21,6 +25,11 @@ optee@de000000 { }; }; +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + &cpu0 { clocks = <&scmi_clk CK_SCMI_MPU>; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts index 0790ed426ebc0..41ba8a5b756b1 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts @@ -13,6 +13,10 @@ / { model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board"; compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157"; + aliases { + watchdog0 = &arm_wdt; + }; + reserved-memory { optee@de000000 { reg = <0xde000000 0x2000000>; @@ -21,6 +25,11 @@ optee@de000000 { }; }; +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + &cpu0 { clocks = <&scmi_clk CK_SCMI_MPU>; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts index 0a3894aff4aea..2fad04ed60161 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts @@ -13,6 +13,10 @@ / { model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter"; compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157"; + aliases { + watchdog0 = &arm_wdt; + }; + reserved-memory { optee@fe000000 { reg = <0xfe000000 0x2000000>; @@ -21,6 +25,11 @@ optee@fe000000 { }; }; +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + &cpu0 { clocks = <&scmi_clk CK_SCMI_MPU>; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts index c2b6efb1cbb74..d14506e9b6f0e 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts @@ -13,6 +13,10 @@ / { model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother"; compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157"; + aliases { + watchdog0 = &arm_wdt; + }; + reserved-memory { optee@fe000000 { reg = <0xfe000000 0x2000000>; @@ -21,6 +25,11 @@ optee@fe000000 { }; }; +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + &cpu0 { clocks = <&scmi_clk CK_SCMI_MPU>; }; -- 2.34.1