[PATCH 20/24] arm64: Move MTE insn wrappers to <asm/mte-def.h>

["Pierre-Clément Tosi" <ptosi@google.com>]

Relocate all assembly from <asm/mte-kasan.h> to a KASAN-agnostic header.

Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
---
 arch/arm64/include/asm/mte-def.h   | 45 ++++++++++++++++++++++++++++++++++
 arch/arm64/include/asm/mte-kasan.h | 49 +++-----------------------------------
 2 files changed, 48 insertions(+), 46 deletions(-)

diff --git a/arch/arm64/include/asm/mte-def.h b/arch/arm64/include/asm/mte-def.h
index 660948a3fa9c..b86d0e7e45ed 100644
--- a/arch/arm64/include/asm/mte-def.h
+++ b/arch/arm64/include/asm/mte-def.h
@@ -19,6 +19,7 @@
 
 #include <linux/bitfield.h>
 #include <linux/types.h>
+#include <asm/compiler.h>
 
 #define __mte_tag_of(addr)	FIELD_GET(MTE_TAG_MASK, addr)
 #define __mte_tagged(addr, tag)	u64_replace_bits(addr, tag, MTE_TAG_MASK)
@@ -33,6 +34,50 @@ static __always_inline void *mte_tagged(const void *ptr, u8 tag)
 	return (void *)__mte_tagged((u64)ptr, tag);
 }
 
+static __always_inline u64 __irg(u64 addr)
+{
+	asm volatile(__MTE_PREAMBLE "irg %0, %0"
+		     : "+r" (addr));
+
+	return addr;
+}
+
+static __always_inline u64 __ldg(u64 addr)
+{
+	asm(__MTE_PREAMBLE "ldg %0, [%0]"
+	    : "+r" (addr));
+
+	return addr;
+}
+
+static __always_inline u64 __stg_post(u64 addr)
+{
+	asm volatile(__MTE_PREAMBLE "stg %0, [%0], #16"
+		     : "+r" (addr)
+		     :
+		     : "memory");
+	return addr;
+}
+
+static __always_inline u64 __stzg_post(u64 addr)
+{
+	asm volatile(__MTE_PREAMBLE "stzg %0, [%0], #16"
+		     : "+r" (addr)
+		     :
+		     : "memory");
+	return addr;
+}
+
+static __always_inline void __dc_gva(u64 addr)
+{
+	asm volatile(__MTE_PREAMBLE "dc gva, %0" : : "r" (addr) : "memory");
+}
+
+static __always_inline void __dc_gzva(u64 addr)
+{
+	asm volatile(__MTE_PREAMBLE "dc gzva, %0" : : "r" (addr) : "memory");
+}
+
 #endif /* __ASSEMBLER__ */
 
 #endif /* __ASM_MTE_DEF_H  */
diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mte-kasan.h
index 9d018d3a0b3b..66d72d0d3c43 100644
--- a/arch/arm64/include/asm/mte-kasan.h
+++ b/arch/arm64/include/asm/mte-kasan.h
@@ -9,7 +9,6 @@
 #include <linux/const.h>
 #include <linux/kasan-tags.h>
 
-#include <asm/compiler.h>
 #include <asm/cputype.h>
 #include <asm/mte-def.h>
 
@@ -66,57 +65,20 @@ static inline void mte_enable_tco(void)
 	set_pstate_tco(1);
 }
 
-static inline u8 mte_get_ptr_tag(void *ptr)
-{
-	return kasan_tag_from_mte(mte_tag_of(ptr));
-}
-
 /* Get allocation tag for the address. */
 static inline u8 mte_get_mem_tag(void *addr)
 {
-	asm(__MTE_PREAMBLE "ldg %0, [%0]"
-		: "+r" (addr));
-
-	return mte_get_ptr_tag(addr);
+	return kasan_tag_from_mte(__mte_tag_of(__ldg((u64)addr)));
 }
 
 /* Generate a random tag. */
 static inline void *mte_set_random_tag(const void *addr)
 {
 	/* Writes the random MTE tag in bits [59:56]. */
-	asm volatile(__MTE_PREAMBLE "irg %0, %0"
-		: "+r" (addr));
+	addr = (const void *)__irg((u64)addr);
 
 	/* Sets bits [63:60] as KASAN expects. */
-	return (void *)__tag_set(addr, mte_get_ptr_tag((void *)addr));
-}
-
-static inline u64 __stg_post(u64 p)
-{
-	asm volatile(__MTE_PREAMBLE "stg %0, [%0], #16"
-		     : "+r"(p)
-		     :
-		     : "memory");
-	return p;
-}
-
-static inline u64 __stzg_post(u64 p)
-{
-	asm volatile(__MTE_PREAMBLE "stzg %0, [%0], #16"
-		     : "+r"(p)
-		     :
-		     : "memory");
-	return p;
-}
-
-static inline void __dc_gva(u64 p)
-{
-	asm volatile(__MTE_PREAMBLE "dc gva, %0" : : "r"(p) : "memory");
-}
-
-static inline void __dc_gzva(u64 p)
-{
-	asm volatile(__MTE_PREAMBLE "dc gzva, %0" : : "r"(p) : "memory");
+	return (void *)__tag_set(addr, kasan_tag_from_mte(mte_tag_of(addr)));
 }
 
 /*
@@ -188,11 +150,6 @@ static inline void mte_enable_tco(void)
 {
 }
 
-static inline u8 mte_get_ptr_tag(void *ptr)
-{
-	return 0xFF;
-}
-
 static inline u8 mte_get_mem_tag(void *addr)
 {
 	return 0xFF;

-- 
2.56.0.455.g6c5a503b38-goog