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charset="utf-8" Content-Transfer-Encoding: quoted-printable Add a dedicated Kconfig symbol to top off the first round of patches decoupling MTE code from KASAN. Although the config isn't intended to be used by anything other than KASAN_HW_TAGS today, it already provides a clearer distinction between code that is architecturally required for supporting MTE at EL1 (e.g. TCO management) and code that is specific to KASAN (e.g. allocation alignment). Signed-off-by: Pierre-Cl=C3=A9ment Tosi --- arch/arm64/Kconfig | 8 ++++++++ arch/arm64/include/asm/mte.h | 2 +- arch/arm64/kernel/mte.c | 4 ++-- arch/arm64/lib/strlen.S | 4 ++-- 4 files changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 1075bc661833..af5a7f5a0d94 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2255,6 +2255,7 @@ config ARM64_MTE select ARCH_USES_HIGH_VMA_FLAGS select ARCH_USES_PG_ARCH_2 select ARCH_USES_PG_ARCH_3 + select ARM64_MTE_KERNEL if KASAN_HW_TAGS help Memory Tagging (part of the ARMv8.5 Extensions) provides architectural support for run-time, always-on detection of @@ -2275,6 +2276,13 @@ config ARM64_MTE =20 Documentation/arch/arm64/memory-tagging-extension.rst. =20 +config ARM64_MTE_KERNEL + bool + depends on ARM64_MTE + help + This option enables the support for the Memory Tagging + Extension at EL1 (i.e. for kernelspace). + endmenu # "ARMv8.5 architectural features" =20 menu "ARMv8.7 architectural features" diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h index 34d1438019ed..7a49729f6a48 100644 --- a/arch/arm64/include/asm/mte.h +++ b/arch/arm64/include/asm/mte.h @@ -34,7 +34,7 @@ void mte_invalidate_tags_area(int type); void *mte_allocate_tag_storage(void); void mte_free_tag_storage(char *storage); =20 -#ifdef CONFIG_KASAN_HW_TAGS +#ifdef CONFIG_ARM64_MTE_KERNEL DECLARE_STATIC_KEY_FALSE(mte_sync_or_asymm_mode); DECLARE_STATIC_KEY_FALSE(mte_async_or_asymm_mode); =20 diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c index d072cb76ad05..888519e14a76 100644 --- a/arch/arm64/kernel/mte.c +++ b/arch/arm64/kernel/mte.c @@ -31,7 +31,7 @@ =20 static DEFINE_PER_CPU_READ_MOSTLY(u64, mte_tcf_preferred); =20 -#ifdef CONFIG_KASAN_HW_TAGS +#ifdef CONFIG_ARM64_MTE_KERNEL /* * The asynchronous and asymmetric MTE modes have the same behavior for * store operations. This flag is set when either of these modes is enable= d. @@ -100,6 +100,7 @@ int memcmp_pages(struct page *page1, struct page *page2= ) return ret; } =20 +#ifdef CONFIG_ARM64_MTE_KERNEL static inline void __mte_enable_kernel(const char *mode, unsigned long tcf= ) { /* Enable MTE Sync Mode for EL1. */ @@ -110,7 +111,6 @@ static inline void __mte_enable_kernel(const char *mode= , unsigned long tcf) pr_info_once("MTE: enabled in %s mode at EL1\n", mode); } =20 -#ifdef CONFIG_KASAN_HW_TAGS void mte_enable_kernel_sync(void) { /* diff --git a/arch/arm64/lib/strlen.S b/arch/arm64/lib/strlen.S index a8c49a3886f6..80557af775de 100644 --- a/arch/arm64/lib/strlen.S +++ b/arch/arm64/lib/strlen.S @@ -44,11 +44,11 @@ #define REP8_80 0x8080808080808080 =20 /* - * When KASAN_HW_TAGS is in use, memory is checked at MTE_GRANULE_SIZE + * When ARM64_MTE_KERNEL is in use, memory is checked at MTE_GRANULE_SIZE * (16-byte) granularity, and we must ensure that no access straddles this * alignment boundary. */ -#ifdef CONFIG_KASAN_HW_TAGS +#ifdef CONFIG_ARM64_MTE_KERNEL #define MIN_PAGE_SIZE MTE_GRANULE_SIZE #else #define MIN_PAGE_SIZE 4096 --=20 2.56.0.455.g6c5a503b38-goog