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Sat, 7 Nov 2026 09:48:17 -0600 Received: from satlexmb08.amd.com (10.181.42.217) by satlexmb10.amd.com (10.181.42.219) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.53; Sat, 7 Nov 2026 09:48:16 -0600 Received: from amd-System-Product-Name.amd.com (10.180.168.240) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server id 15.2.2562.53 via Frontend Transport; Sat, 7 Nov 2026 09:48:12 -0600 From: Vijendar Mukunda To: CC: , , , , , , , , , , , , , "Vijendar Mukunda" Subject: [PATCH v5 03/25] soundwire: amd: add pad ctrl helpers for D0/D3 PM transitions Date: Sat, 7 Nov 2026 21:15:12 +0530 Message-ID: <20261107154659.3358223-4-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261107154659.3358223-1-Vijendar.Mukunda@amd.com> References: <20261107154659.3358223-1-Vijendar.Mukunda@amd.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF00026968:EE_|SA3PR12MB368938:EE_ X-MS-Office365-Filtering-Correlation-Id: 25640257-af56-473e-1392-08df3ce68aec X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|23010399003|376014|1800799024|36860700016|11063799006|5023799004|56012099006|261022105027099003|261009223027099003|261022075727099003|261021121427099003|261026121527099003|261026140227099003|261028144727099003|261102123227099003|10067099003|22082099003|18002099003|6133799003|3023799007; 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On some OEM platforms based on ACP 7.0/7.1/7.2, a transient High pulse is observed after the initial Low; the clock briefly follows a High -> Low -> High -> Low sequence (High lasting a few milliseconds) instead of the expected High -> Low. This spurious High edge interferes with wake interrupt detection, causing wake events to be silently missed. Hardware team analysis identified that the pad keeper, pulldown, SCHMEN control and output-enable registers must be programmed as a coordinated sequence during D3 entry and D0 re-entry to suppress the transient bounce and restore the pads correctly on resume. Introduce amd_sdw_pad_ctrl() to program PAD_KEEPER_EN, PAD_PULLDOWN_CTRL, PAD_SCHMEN_CTRL and PAD_DISABLE_OE_CTRL in a single call for D0 entry (enable=true) or D3 entry (enable=false). Introduce amd_sdw_oe_ctrl() as a lighter helper that only toggles OE. Introduce amd_sdw_pad_ctrl_supported() to consolidate the ACP revision check; both helpers use it in place of duplicate switch statements. Both helpers apply only to ACP 7.0/7.1/7.2; ACP 6.3 returns without error and unknown revisions emit a dev_err and return. Wire amd_sdw_pad_ctrl() into amd_suspend() and amd_resume_runtime(). Wire amd_sdw_oe_ctrl() into amd_suspend_runtime() to disable OE while leaving keeper and schmen enabled; pads remain capable of detecting wake events when wake is armed. Fixes: 829c3e1cb4a3 ("soundwire: amd: set device power state during suspend/resume sequence") Signed-off-by: Vijendar Mukunda --- drivers/soundwire/amd_manager.c | 108 ++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c index a3316efdf8ac..b21691652490 100644 --- a/drivers/soundwire/amd_manager.c +++ b/drivers/soundwire/amd_manager.c @@ -152,6 +152,104 @@ static int amd_deinit_sdw_manager(struct amd_sdw_manager *amd_manager) return amd_disable_sdw_manager(amd_manager); } +static void __amd_sdw_oe_update(struct amd_sdw_manager *amd_manager, + u32 mask, bool enable) +{ + amd_updatel(amd_manager->acp_mmio, ACP_PAD_DISABLE_OE_CTRL, + mask, enable ? 0 : mask); +} + +static bool amd_sdw_pad_ctrl_supported(struct amd_sdw_manager *amd_manager) +{ + switch (amd_manager->acp_rev) { + case ACP70_PCI_REV_ID: + case ACP71_PCI_REV_ID: + case ACP72_PCI_REV_ID: + return true; + case ACP63_PCI_REV_ID: + return false; + default: + dev_err(amd_manager->dev, "unknown ACP revision 0x%x\n", + amd_manager->acp_rev); + return false; + } +} + +static void amd_sdw_oe_ctrl(struct amd_sdw_manager *amd_manager, bool enable) +{ + u32 mask; + + if (!amd_sdw_pad_ctrl_supported(amd_manager)) + return; + + switch (amd_manager->instance) { + case ACP_SDW0: + mask = AMD_SDW0_PAD_OE_CTRL_MASK; + break; + case ACP_SDW1: + mask = AMD_SDW1_PAD_OE_CTRL_MASK; + break; + default: + dev_err(amd_manager->dev, "invalid SDW instance %d\n", + amd_manager->instance); + return; + } + + mutex_lock(amd_manager->acp_sdw_lock); + __amd_sdw_oe_update(amd_manager, mask, enable); + mutex_unlock(amd_manager->acp_sdw_lock); +} + +static void amd_sdw_pad_ctrl(struct amd_sdw_manager *amd_manager, bool enable) +{ + u32 keeper_mask, pulldown_mask, schmen_mask, oe_mask; + + if (!amd_sdw_pad_ctrl_supported(amd_manager)) + return; + + switch (amd_manager->instance) { + case ACP_SDW0: + keeper_mask = AMD_SDW0_PAD_KEEPER_EN_MASK; + pulldown_mask = AMD_SDW0_PAD_PULLDOWN_MASK; + schmen_mask = AMD_SDW0_PAD_SCHMEN_MASK; + oe_mask = AMD_SDW0_PAD_OE_CTRL_MASK; + break; + case ACP_SDW1: + keeper_mask = AMD_SDW1_PAD_KEEPER_EN_MASK; + pulldown_mask = AMD_SDW1_PAD_PULLDOWN_MASK; + schmen_mask = AMD_SDW1_PAD_SCHMEN_MASK; + oe_mask = AMD_SDW1_PAD_OE_CTRL_MASK; + break; + default: + dev_err(amd_manager->dev, "invalid SDW instance %d\n", + amd_manager->instance); + return; + } + + mutex_lock(amd_manager->acp_sdw_lock); + if (enable) { + /* D0: set keeper, clear pulldown, set schmen */ + amd_updatel(amd_manager->acp_mmio, ACP_SW_PAD_KEEPER_EN, + keeper_mask, keeper_mask); + amd_updatel(amd_manager->acp_mmio, ACP_PAD_PULLDOWN_CTRL, + pulldown_mask, 0); + amd_updatel(amd_manager->acp_mmio, ACP_PAD_SCHMEN_CTRL, + schmen_mask, schmen_mask); + } else { + /* D3: clear keeper, set pulldown, clear schmen */ + amd_updatel(amd_manager->acp_mmio, ACP_SW_PAD_KEEPER_EN, + keeper_mask, 0); + amd_updatel(amd_manager->acp_mmio, ACP_PAD_PULLDOWN_CTRL, + pulldown_mask, pulldown_mask); + amd_updatel(amd_manager->acp_mmio, ACP_PAD_SCHMEN_CTRL, + schmen_mask, 0); + } + + /* enable OE on D0 (clear disable bits), disable OE on D3 (set them) */ + __amd_sdw_oe_update(amd_manager, oe_mask, enable); + mutex_unlock(amd_manager->acp_sdw_lock); +} + static void amd_sdw_set_frameshape(struct amd_sdw_manager *amd_manager) { u32 frame_size; @@ -1319,6 +1417,8 @@ static int __maybe_unused amd_suspend(struct device *dev) ret = amd_deinit_sdw_manager(amd_manager); if (ret) return ret; + /* System suspend: tear down all pads */ + amd_sdw_pad_ctrl(amd_manager, false); } if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) { ret = amd_sdw_set_device_state(amd_manager, AMD_SDW_DEVICE_STATE_D3); @@ -1363,6 +1463,13 @@ static int __maybe_unused amd_suspend_runtime(struct device *dev) ret = amd_deinit_sdw_manager(amd_manager); if (ret) return ret; + /* + * For ACP 7.0/7.1/7.2: disable OE only; keeper and schmen remain + * enabled unconditionally so that wake-capable devices can detect + * wake events if wake is armed. + * For ACP 6.3 this call is a no-op. + */ + amd_sdw_oe_ctrl(amd_manager, false); } if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) { ret = amd_sdw_set_device_state(amd_manager, AMD_SDW_DEVICE_STATE_D3); @@ -1403,6 +1510,7 @@ static int __maybe_unused amd_resume_runtime(struct device *dev) return ret; } } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) { + amd_sdw_pad_ctrl(amd_manager, true); writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance)); if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) { ret = amd_sdw_host_wake_enable(amd_manager, false); -- 2.53.0