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[76.99.126.200]) by smtp.gmail.com with ESMTPSA id af79cd13be357-94782ccaea3sm78072585a.4.2026.11.07.17.51.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 07 Nov 2026 17:51:27 -0800 (PST) From: Doug Calobrisi To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Nikolas Joshua Britton , Maciej Grochowski , Mesih Kilinc , Geramy Loveless , Eric Auger , Alexey Fomenko , Lorenzo Pieralisi , Rob Herring , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= Subject: Re: [PATCH v5 00/14] PCI: Resource placement algorithm fixes Date: Sat, 7 Nov 2026 20:51:07 -0500 Message-ID: <20261108015109.65207-1-doug@calobrisi.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261106134341.39493-1-ilpo.jarvinen@linux.intel.com> References: <20261106134341.39493-1-ilpo.jarvinen@linux.intel.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On Fri, 6 Nov 2026, Ilpo Järvinen wrote: > There have been major changes so any retesting is appreciated I tested v5 on v7.4-rc1 with four AMD Radeon AI PRO R9700s behind a PEX88096 switch on an X570 board. Each GPU's window holds a 32G BAR0 and a 2M BAR2, so it's 0x800200000 in size and its BAR0 needs 32G alignment. With firmware ReBAR on, the board doesn't POST once two RTX 3090s are also on the switch. So with ReBAR off I set the four BAR0s to 32G from Linux, then remove and rescan root port 00:03.1 so the kernel sizes the windows again. On unpatched v7.4-rc1 the switch window is sized as the plain sum of its child windows, one R9700 loses its 32G BAR0 and both 3090s lose their 64-bit BARs. With v5 everything is assigned: pci 0000:0b:04.0: bridge window [mem 0x2800000000-0x67ffffffff 64bit pref]: assigned pci 0000:11:00.0: bridge window [mem 0x2800000000-0x30001fffff 64bit pref]: assigned pci 0000:11:08.0: bridge window [mem 0x5fffe00000-0x67ffffffff 64bit pref]: assigned pci 0000:11:10.0: bridge window [mem 0x37ffe00000-0x3fffffffff 64bit pref]: assigned pci 0000:11:18.0: bridge window [mem 0x4000000000-0x48001fffff 64bit pref]: assigned amdgpu then binds all four and P2P between them works. Logs and the test script are available if useful. Tested-by: Doug Calobrisi Thanks, Doug