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Sun, 08 Nov 2026 06:31:52 -0800 (PST) Received: from fedora41 ([2a01:e0a:1058:7c30:e315:b955:cb8b:b86b]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b90ee2b8c0sm68486485e9.9.2026.11.08.06.31.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Nov 2026 06:31:52 -0800 (PST) From: Timo Joannin To: Thomas Bogendoerfer , Orgad Shaneh Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Timo Joannin Subject: [PATCH] mips: cavium-octeon: fix missing prototypes Date: Sun, 8 Nov 2026 15:31:40 +0100 Message-ID: <20261108143140.157628-1-timo.joannin@gmail.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The compiler throws -Wmissing-prototypes warnings for several functions in the cavium octeon architecture code. It occurs due to a mix of hardcoded prototypes scattered across C files, a block-scoped extern declaration, and missing header files. Fix the warnings by: - Moving the prototype for octeon_fill_mac_addresses() from setup.c to - Removing the block-scoped extern declaration for octeon_send_ipi_single() in mm/c-octeon.c and exposing via - Moving the prototype __cvmx_interrupt_gmxx_rxx_int_en_enable() from cvmx-interrupt-rsl.c to the cvmx-gmxx-defs shared header. - Adding the missing #include to cvmx-helper-errata.c. These changes pass the compiler's -Wmissing-prototypes safety checks without changing any runtime logic. Signed-off-by: Timo Joannin --- arch/mips/cavium-octeon/executive/cvmx-helper-errata.c | 1 + arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c | 2 -- arch/mips/cavium-octeon/setup.c | 2 -- arch/mips/include/asm/octeon/cvmx-gmxx-defs.h | 2 ++ arch/mips/include/asm/octeon/octeon.h | 2 ++ arch/mips/mm/c-octeon.c | 1 - 6 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c b/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c index 4b26fedecf46..4ced03c18ad8 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c @@ -38,6 +38,7 @@ #include #include +#include /** * Due to errata G-720, the 2nd order CDR circuit on CN52XX pass diff --git a/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c b/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c index d23f46736dd6..314672040f2f 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c +++ b/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c @@ -39,8 +39,6 @@ #define PRINT_ERROR(format, ...) #endif -void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block); - /** * Enable ASX error interrupts that exist on CN3XXX, CN50XX, and * CN58XX. diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 7497be7b9431..a1159a3d7f78 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -1156,8 +1156,6 @@ void __init prom_free_prom_memory(void) } } -void __init octeon_fill_mac_addresses(void); - void __init device_tree_init(void) { const void *fdt = NULL; diff --git a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h index bdba676f1f2c..27b2ae74e948 100644 --- a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h @@ -2256,4 +2256,6 @@ union cvmx_gmxx_tx_xaui_ctl { } s; }; +void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block); + #endif diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 5c1d726c702f..ef1eb000f46d 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -31,6 +31,7 @@ extern void *octeon_bootmem_alloc_named_address(uint64_t size, uint64_t address, extern int octeon_bootmem_free_named(char *name); extern void octeon_bootmem_lock(void); extern void octeon_bootmem_unlock(void); +extern void octeon_send_ipi_single(int cpu, unsigned int action); extern int octeon_is_simulation(void); extern int octeon_is_pci_host(void); @@ -47,6 +48,7 @@ extern void octeon_user_io_init(void); extern void octeon_init_cvmcount(void); extern void octeon_setup_delays(void); +extern void octeon_fill_mac_addresses(void); extern void octeon_io_clk_delay(unsigned long); #define OCTEON_ARGV_MAX_ARGS 64 diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index b7393b61cfa7..f6b890a89ea1 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -62,7 +62,6 @@ static void local_octeon_flush_icache_range(unsigned long start, */ static void octeon_flush_icache_all_cores(struct vm_area_struct *vma) { - extern void octeon_send_ipi_single(int cpu, unsigned int action); #ifdef CONFIG_SMP int cpu; cpumask_t mask; -- 2.56.0