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Sun, 08 Nov 2026 11:25:41 -0800 (PST) Received: from evo.www.tendawifi.com ([103.98.7.220]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b37560d95dsm6607366c88.11.2026.11.08.11.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Nov 2026 11:25:40 -0800 (PST) From: Archit More To: Pratyush Yadav , Michael Walle Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Archit More Subject: [PATCH] mtd: spi-nor: winbond: W25Q512NW-Q/N/M: Fill locking information Date: Mon, 9 Nov 2026 00:55:18 +0530 Message-Id: <20261108192518.46803-1-architmore303@gmail.com> X-Mailer: git-send-email 2.34.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The W25Q512NW chips support standard Block Protection (BP0-BP3), Top/Bottom selection (TB in Status Register 1 bit 6), and Complement protection (CMP in Status Register 2 bit 6), matching the layout of other NW-family parts (such as W25Q01NW and W25H512NW). Add the missing flags so that software write protection and complement features are properly enabled. Signed-off-by: Archit More --- drivers/mtd/spi-nor/winbond.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 51f6bcd3f8e5..6ba1a137a549 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -406,6 +406,8 @@ static const struct flash_info winbond_nor_parts[] = { /* W25Q512NW-Q/N */ .id = SNOR_ID(0xef, 0x60, 0x20), .name = "w25q512nwq", + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, .otp = SNOR_OTP(256, 3, 0x1000, 0x1000), }, { /* W25Q01NW-Q/N */ @@ -500,6 +502,8 @@ static const struct flash_info winbond_nor_parts[] = { /* W25Q512NW-M */ .id = SNOR_ID(0xef, 0x80, 0x20), .name = "w25q512nwm", + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, .otp = SNOR_OTP(256, 3, 0x1000, 0x1000), }, { /* W25Q01NW-M */ -- 2.34.1