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Mon, 09 Nov 2026 06:01:58 -0800 (PST) X-Received: by 2002:a05:6123:64:b0:5c9:a60b:e5c0 with SMTP id 71dfb90a1353d-5ece724fbd5mr1250098e0c.16.1794232917994; Mon, 09 Nov 2026 06:01:57 -0800 (PST) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:f9b5:154f:6aa3:35d3]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b79502652csm161515845e9.4.2026.11.09.06.01.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 06:01:57 -0800 (PST) From: Loic Poulain Subject: [PATCH v4 0/7] i2c: qcom-cci: Runtime capability detection and improved read/write Date: Mon, 09 Nov 2026 15:01:53 +0100 Message-Id: <20261109-cci-imp-v4-0-4dc4095dd052@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAFHS8WoC/3WNyw6CMBBFf4V0bUk7rUBd+R/GRSmjNJFXC0RD+ HcLJsJCN5Pcm3vOTMSjs+jJKZqIw9F629QhyENETKnrO1JbhEyAQcIUKGqMpbZqaZZrkUnBlJJ Awrp1eLPP1XS5frLDbgjCfitL6/vGvdZvI1/aVcwZk1/xyCmjAGnBweQyA3VuvI+7QT9MU1VxO GRRjbDDudhwCHiSpUJAkkupxR9c7PFkw0XAj4gpGo6aa/4Dn+f5Da+ggVo4AQAA X-Change-ID: 20260929-cci-imp-8ba384309942 To: Robert Foss , Andi Shyti , Konrad Dybcio Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain , Bryan O'Donoghue X-Mailer: b4 0.14.2 X-Proofpoint-GUID: KiJR91VnfWdaC0B6H9tum4FpnKZ4wOSq X-Authority-Analysis: v=2.4 cv=MpfHeGae c=1 sm=1 tr=0 ts=6af1d257 cx=c_pps a=1Os3MKEOqt8YzSjcPV0cFA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Pm5qjrwcTqiPDamcvu8A:9 a=QEXdDO2ut3YA:10 a=hhpmQAJR8DioWGSBphRh:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTA5MDA1NSBTYWx0ZWRfXxHUO8OT6vvkj v3paTBj15DWvFJr6wWnwOr0KZWMJE1jxlPGdfkF5WMdfgFBIGGMBYaBkTncXsQVKlP/B/9hp9dp LOS142QyRRY0PUbtg3Q02iWRAYJyW+b+3heHjatC6fz6o1kFAFMfLWPqUlEWOtkmBD4vubOWh71 567OiQsrrTiz9lEx+C6/mrwD1AJJWVTj+1TufJPRXdE60GtoYiC4bSAH4Lacv7CVmiFFUZtVbY7 Hhuw714SQSwXKbEcyN8baZ+SzauuRqYW0+vwtOzCf/9QftJxGeobRx6COoayD7H64fRIRM/2GrR 2B838EK5sqmCMaoa28eOwkDx2TUbbR8n+2sJop/WJ7J0NPt/odhEruaDUcIxQ8X5OMoWERFNpFd DM+kGuvvBDQXYwunoRXxpSQ6FsjCLpGMz1JK1I+SPhza5r2Q4uOvNZgTEw49P4V3YXl87o/STU8 M3QdSsUPfHR0n9Jlvjg== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTA5MDA1NSBTYWx0ZWRfX1QThxY3iyV1B oaBqL5B6/LV8dbuydZCzMQhG/ORVRd4ggBdDKw2urXeBx8Sn3sEOh42y0IK41+ciEpgEtmWOc+B /WhanTMSj3et/TeBOXzGckeZZwqFVs8= X-Proofpoint-ORIG-GUID: KiJR91VnfWdaC0B6H9tum4FpnKZ4wOSq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-09_05,2026-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 priorityscore=1501 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611090055 Improves the Qualcomm CCI I2C driver read/write in different ways: - Capabilities (queue sizes, max transfer lengths, supported I2C mode) are currently hardcoded per DT compatible string in a handful of cci_data instances. Replace the static per-compatible structs with a single version-sorted capability catalog resolved at runtime from CCI_HW_VERSION. - The driver only supported single-command writes, capped at 11 bytes regardless of how much space the command queue actually has. Factor out the write-command queueing into a reusable helper and then add burst-write support, chunking longer writes across the whole queue instead of a single command's payload. - The FIFO read path hardcoded a fixed 12-byte limit unrelated to the actual per-revision FIFO size, with a special-cased drain loop. Simplify the FIFO read/drain loop and derive the read-side limits from each revision's FIFO size. - Add burst-read support using threshold interrupts, allowing reads of arbitrary size by draining the FIFO incrementally during the transfer. Also add overflow and underflow IRQ reporting, as queue/fifo limits are now derived from the hardware capabilities and exercised more aggressively. Unbounded writes, which refill the command queue while the transfer is still in flight and so lift the queue-depth limit on the write side, build on this series and will be posted separately. Reads up to 4 KiB and writes up to the full command queue depth (451 bytes on this part) were exercised on an imx219 behind CCI v1.8 (128-word queue, 400 kHz). Signed-off-by: Loic Poulain --- Changes in v4: - Reject an oversized write with -EINVAL instead of -EOPNOTSUPP (Konrad) - Burst read: terminate the drain loop on RD_DONE instead of on the expected byte count, so the transfer is never left in flight when the last bytes arrive on a threshold interrupt (Konrad) - Burst read: restore the short-read sanity check that was dropped, now comparing bytes read against bytes expected so it covers the threshold and the legacy path alike (Konrad) - Burst read: disable the RD_THRESHOLD interrupt on the error exits as well, not only on completion (Konrad) - Burst read: bound the fifo drain loop by the expected word count, so a bogus hardware fifo level cannot turn it into an unbounded loop - Link to v3: https://lore.kernel.org/r/20261016-cci-imp-v3-0-5ee7ec1ea1a1@oss.qualcomm.com Changes in v3: - Reject a write longer than the advertised limit with an error rather than ignoring it. (Bryan) - Build the command words with FIELD_PREP() instead of open-coded shifts, which also documents the per-opcode field widths (Konrad) - Actually program CCI_IRQ_MASK_1, the RD_PAUSE bits were being ORed into the value written to CCI_IRQ_MASK_0 and so never took effect - Clear the per-transfer status on entry and stop reinitialising the completion in the read drain loop, as RD_DONE can fire while the fifo is being drained - Link to v2: https://lore.kernel.org/r/20261013-cci-imp-v2-0-6873326b44a3@oss.qualcomm.com Changes in v2: - Split the HALT_ACK reset fix out into its own patch (Andi) - Fix a typo in the "Detect capabilities from CCI_HW_VERSION" commit message (Andi) - Use GENMASK()/FIELD_GET() to decode the CCI_HW_VERSION fields (Konrad) - Derive the number of masters from the DT i2c-bus subnodes instead of encoding it per compatible string (Konrad) - Add burst read support via RD_THRESHOLD/RD_PAUSE IRQs - Link to v1: https://lore.kernel.org/r/20261004-cci-imp-v1-0-227d12cb4829@oss.qualcomm.com --- Loic Poulain (7): i2c: qcom-cci: Factor out write command queue programming i2c: qcom-cci: Handle and report queue overflow/underflow interrupts i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime i2c: qcom-cci: Add burst write support i2c: qcom-cci: Extend i2c read limits based on CCI revision i2c: qcom-cci: Add burst read support i2c: qcom-cci: Build command words with FIELD_PREP() drivers/i2c/busses/i2c-qcom-cci.c | 495 +++++++++++++++++++++++++++++--------- 1 file changed, 386 insertions(+), 109 deletions(-) --- base-commit: 00fb8097ca5a4fcf0e0cc1550075aa7313bbd32a change-id: 20260929-cci-imp-8ba384309942 Best regards, -- Loic Poulain