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That payload was open-coded as a bare shift at each site, which hides how wide the fields actually are. Describe the fields and use FIELD_PREP() instead. No functional change. Suggested-by: Konrad Dybcio Reviewed-by: Konrad Dybcio Signed-off-by: Loic Poulain --- drivers/i2c/busses/i2c-qcom-cci.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c index 7452ee8eab0635bf6562f4dbfb2342263211cbb8..66cf68837a9112f83503ad7299775d1a2c6953c6 100644 --- a/drivers/i2c/busses/i2c-qcom-cci.c +++ b/drivers/i2c/busses/i2c-qcom-cci.c @@ -102,6 +102,17 @@ #define NUM_MASTERS 2 #define NUM_QUEUES 2 +/* + * A command word is a 4-bit opcode followed by an opcode specific payload. + * The payload width differs per opcode: a write carries its length in a + * nibble (which is what makes 0xf available as the burst marker) and is + * followed by the data bytes, while a read carries a 16-bit length. + */ +#define CCI_I2C_CMD_OP GENMASK(3, 0) +#define CCI_I2C_PARAM_ADDR GENMASK(10, 4) +#define CCI_I2C_WRITE_LEN GENMASK(7, 4) +#define CCI_I2C_READ_LEN GENMASK(19, 4) + #define CCI_I2C_SET_PARAM 1 #define CCI_I2C_LOCK 6 #define CCI_I2C_UNLOCK 7 @@ -574,7 +585,7 @@ static int cci_validate_queue(struct cci *cci, u8 master, u8 queue) if (!val) return 0; - val = CCI_I2C_REPORT | CCI_I2C_REPORT_IRQ_EN; + val = FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_REPORT) | CCI_I2C_REPORT_IRQ_EN; writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue)); return cci_run_queue(cci, master, queue); @@ -607,10 +618,12 @@ static int cci_i2c_read(struct cci *cci, u16 master, if (ret < 0) return ret; - val = CCI_I2C_SET_PARAM | (addr & 0x7f) << 4; + val = FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_SET_PARAM) | + FIELD_PREP(CCI_I2C_PARAM_ADDR, addr); writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue)); - val = CCI_I2C_READ | len << 4; + val = FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_READ) | + FIELD_PREP(CCI_I2C_READ_LEN, len); writel(val, cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, queue)); val = readl(cci->base + CCI_I2C_Mm_Qn_CUR_WORD_CNT(master, queue)); @@ -685,7 +698,8 @@ static void cci_i2c_load_write(void __iomem *loadq, u8 *buf, u16 len, bool burst { u32 cmd[CCI_I2C_WRITE_WC] = { }; - cmd[0] = CCI_I2C_WRITE | (burst ? CCI_I2C_WRITE_BURST : len) << 4; + cmd[0] = FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_WRITE) | + FIELD_PREP(CCI_I2C_WRITE_LEN, burst ? CCI_I2C_WRITE_BURST : len); memcpy((u8 *)cmd + 1, buf, len); iowrite32_rep(loadq, cmd, CCI_I2C_WRITE_NWORDS(len)); } @@ -713,9 +727,10 @@ static int cci_i2c_write(struct cci *cci, u16 master, return ret; if (burst) - writel(CCI_I2C_LOCK, loadq); + writel(FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_LOCK), loadq); - val = CCI_I2C_SET_PARAM | (addr & 0x7f) << 4; + val = FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_SET_PARAM) | + FIELD_PREP(CCI_I2C_PARAM_ADDR, addr); writel(val, loadq); do { @@ -727,9 +742,9 @@ static int cci_i2c_write(struct cci *cci, u16 master, } while (len); if (burst) - writel(CCI_I2C_UNLOCK, loadq); + writel(FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_UNLOCK), loadq); - val = CCI_I2C_REPORT | CCI_I2C_REPORT_IRQ_EN; + val = FIELD_PREP(CCI_I2C_CMD_OP, CCI_I2C_REPORT) | CCI_I2C_REPORT_IRQ_EN; writel(val, loadq); return cci_run_queue(cci, master, QUEUE_0); -- 2.34.1