From: Conor Dooley <conor@kernel.org>
To: Xincheng Ji <jixincheng@ultrarisc.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Andrew Lunn <andrew@lunn.ch>,
Jia Wang <wangjia@ultrarisc.com>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v7 0/7] riscv: Add device tree support for UltraRISC DP1000
Date: Mon, 9 Nov 2026 18:51:02 +0000 [thread overview]
Message-ID: <20261109-december-oil-cb6524baf274@spud> (raw)
In-Reply-To: <179419183382.2791817.17305257804227954338.b4-reply@b4>
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On Mon, Nov 09, 2026 at 10:37:13AM +0800, Xincheng Ji wrote:
> On 2026-10-25 20:24 +0800, Xincheng Ji wrote:
> Hi all,
>
> A gentle ping on this series adding device tree support for the
> UltraRISC DP1000 SoC and the Shenzhen Rongda M0 and Milk-V Titan boards.
>
> Are there any remaining issues I should address before the series can
> be picked up?
RISC-V ULTRARISC SoC SUPPORT
M: Jia Wang <wangjia@ultrarisc.com>
L: linux-riscv@lists.infradead.org
S: Supported
T: git https://github.com/ultrarisc/linux.git
F: Documentation/devicetree/bindings/riscv/ultrarisc.yaml
F: arch/riscv/boot/dts/ultrarisc/
Your colleague is the maintainer of this platform, you should be asking
them - unless you're expecting someone else to apply the series (me?).
Cheers,
Conor.
>
> Thanks,
> Xincheng
>
> --
> Xincheng Ji <jixincheng@ultrarisc.com>
>
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prev parent reply other threads:[~2026-11-09 18:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-25 12:24 Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 1/7] dt-bindings: vendor-prefixes: Add shenrongda Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 2/7] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 3/7] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 4/7] dt-bindings: timer: Add UltraRISC DP1000 CLINT Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 5/7] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 6/7] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 7/7] riscv: dts: ultrarisc: Add Milk-V Titan " Xincheng Ji via B4 Relay
2026-11-09 2:37 ` [PATCH v7 0/7] riscv: Add device tree support for UltraRISC DP1000 Xincheng Ji
2026-11-09 18:51 ` Conor Dooley [this message]
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