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From: Matt Turner <mattst88@gmail.com>
To: Madhavan Srinivasan <maddy@linux.ibm.com>,
	 Michael Ellerman <mpe@ellerman.id.au>,
	Nicholas Piggin <npiggin@gmail.com>,
	 "Christophe Leroy (CS GROUP)" <chleroy@kernel.org>,
	 "Ritesh Harjani (IBM)" <ritesh.list@gmail.com>,
	 Shrikanth Hegde <sshegde@linux.ibm.com>,
	Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	 Matt Turner <mattst88@gmail.com>
Subject: [PATCH 6/8] powerpc/perf: mpc7450: Export the event format in sysfs
Date: Mon, 09 Nov 2026 20:47:05 -0500	[thread overview]
Message-ID: <20261109-ppc32-perf-v1-6-a6e8a55b3b48@gmail.com> (raw)
In-Reply-To: <20261109-ppc32-perf-v1-0-a6e8a55b3b48@gmail.com>

The MPC7450 PMU has no format/ directory, so perf can take its events
only as raw codes, and cannot set the threshold by name.

Describe the fields of the event code: the PMC select (bits 0-6), the
PMC (bits 8-10), the threshold (bits 12-17) and the threshold multiplier
(bit 18).  A threshold event can then be written as, e.g.,
cpu/event=0x12b,thresh=20/.

Signed-off-by: Matt Turner <mattst88@gmail.com>
---
 arch/powerpc/perf/mpc7450-pmu.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/powerpc/perf/mpc7450-pmu.c b/arch/powerpc/perf/mpc7450-pmu.c
index b2fe977cea16..9bed5c238f45 100644
--- a/arch/powerpc/perf/mpc7450-pmu.c
+++ b/arch/powerpc/perf/mpc7450-pmu.c
@@ -398,6 +398,31 @@ static u64 mpc7450_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
 	},
 };
 
+PMU_FORMAT_ATTR(event,		"config:0-18");
+PMU_FORMAT_ATTR(pmcsel,		"config:0-6");
+PMU_FORMAT_ATTR(pmc,		"config:8-10");
+PMU_FORMAT_ATTR(thresh,		"config:12-17");
+PMU_FORMAT_ATTR(thresh_mult,	"config:18");
+
+static struct attribute *mpc7450_pmu_format_attr[] = {
+	&format_attr_event.attr,
+	&format_attr_pmcsel.attr,
+	&format_attr_pmc.attr,
+	&format_attr_thresh.attr,
+	&format_attr_thresh_mult.attr,
+	NULL,
+};
+
+static const struct attribute_group mpc7450_pmu_format_group = {
+	.name = "format",
+	.attrs = mpc7450_pmu_format_attr,
+};
+
+static const struct attribute_group *mpc7450_pmu_attr_groups[] = {
+	&mpc7450_pmu_format_group,
+	NULL,
+};
+
 struct power_pmu mpc7450_pmu = {
 	.name			= "MPC7450 family",
 	.n_counter		= N_COUNTER,
@@ -411,6 +436,7 @@ struct power_pmu mpc7450_pmu = {
 	.n_generic		= ARRAY_SIZE(mpc7450_generic_events),
 	.generic_events		= mpc7450_generic_events,
 	.cache_events		= &mpc7450_cache_events,
+	.attr_groups		= mpc7450_pmu_attr_groups,
 };
 
 static int __init init_mpc7450_pmu(void)

-- 
2.55.0


  parent reply	other threads:[~2026-11-10  1:47 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10  1:46 [PATCH 0/8] powerpc/perf: mpc7450: Event fixes, SIAR sampling and sysfs event names Matt Turner
2026-11-10  1:47 ` [PATCH 1/8] powerpc/perf: mpc7450: Event 0x30d does not use the threshold Matt Turner
2026-11-10  1:47 ` [PATCH 2/8] powerpc/perf: mpc7450: Event 0x634 counts L2 prefetches, not L1I Matt Turner
2026-11-10  1:47 ` [PATCH 3/8] powerpc/perf: mpc7450: Remove the snoop retry alternatives Matt Turner
2026-11-10  1:47 ` [PATCH 4/8] powerpc/perf: mpc7450: Fill in the L1 data cache events Matt Turner
2026-11-10  1:47 ` [PATCH 5/8] powerpc/perf: mpc7450: Add the PMC6 L3 events to the alternatives table Matt Turner
2026-11-10  1:47 ` Matt Turner [this message]
2026-11-10  1:47 ` [PATCH 7/8] powerpc/perf: Use SIAR for sample addresses on 32-bit Matt Turner
2026-11-10  1:47 ` [PATCH 8/8] powerpc/perf: mpc7450: Export event names in sysfs Matt Turner
2026-11-10  1:55 ` [PATCH 0/8] powerpc/perf: mpc7450: Event fixes, SIAR sampling and sysfs event names Matt Turner

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