Re: [PATCH v2] i2c: designware: preserve invalid SMBus block count

[Mika Westerberg <mika.westerberg@linux.intel.com>]

On Sat, Nov 07, 2026 at 05:11:08PM +0900, Baek Kyu, Kim wrote:
> When a slave reports an invalid SMBus block count, i2c_dw_read() uses
> one extra read to reach STOP. It currently replaces the received count
> with 1 for scheduling and also stores 1 in the message buffer. A count
> above 32 is therefore exposed as a valid one-byte response.
> 
> Keep the received byte in the buffer and limit only the count passed to
> i2c_dw_recv_len(). This preserves the extra read for STOP while retaining
> the invalid count for the caller to reject.
> 
> The DesignWare receive functions were exercised with stubbed register
> input for block counts 0, 1, 32, 33 and 255, with PEC both off and on.
> The original code replaced invalid counts in the message buffer with 1;
> v2 retains the received byte while scheduling the same extra read.
> The arm64 i2c-designware-master.o build passed with W=1.
> No physical controller or end-to-end SMBus result was measured.
> 
> Fixes: 69f035c480d7 ("i2c: designware: Handle invalid SMBus block data response length value")
> Signed-off-by: Baek Kyu, Kim <pocj8ur4in@gmail.com>

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>