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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-5550af60493sm3967801cf.4.2026.11.09.10.49.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 10:49:02 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1xQUQP-00000002A6b-35np; Mon, 09 Nov 2026 14:49:01 -0400 Date: Mon, 9 Nov 2026 14:49:01 -0400 From: Jason Gunthorpe To: "Tian, Kevin" Cc: Jacob Pan , "Aneesh Kumar K.V (Arm)" , "iommu@lists.linux.dev" , Alex Williamson , Alexey Kardashevskiy , Bjorn Helgaas , Catalin Marinas , Joerg Roedel , Jonathan Cameron , Jonathan Hunter , Krishna Reddy , Lukas Wunner , Nicolin Chen , Robin Murphy , Samuel Ortiz , Shameer Kolothum , Steven Price , Suravee Suthikulpanit , Suzuki K Poulose , Thierry Reding , Vasant Hegde , Will Deacon , Xu Yilun , "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-coco@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-tegra@vger.kernel.org" Subject: Re: [PATCH v8 12/15] iommufd/viommu: Allow PCI TSM backends to provide vIOMMU operations Message-ID: <20261109184901.GQ663069@ziepe.ca> References: <20261104161632.3547423-1-aneesh.kumar@kernel.org> <20261104161632.3547423-13-aneesh.kumar@kernel.org> <20261104152351.00002565@linux.microsoft.com> <20261105004934.GE3889730@ziepe.ca> <20261105091622.00004a9c@linux.microsoft.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, Nov 06, 2026 at 08:03:48AM +0000, Tian, Kevin wrote: > > From: Jacob Pan > > Sent: Friday, November 6, 2026 1:16 AM > > > > Hi Jason, > > > > On Wed, 4 Nov 2026 20:49:34 -0400 > > Jason Gunthorpe wrote: > > > > > On Wed, Nov 04, 2026 at 03:23:51PM -0800, Jacob Pan wrote: > > > > > > > I am thinking MSHV/pKVM can register an assignment-only tsm_dev to > > > > leverage this? Could PCI/TSM support this role without > > > > device-security? > > > > > > It is certainly not what TSM was originally imagined for, but with our > > > new arrangement, yah maybe so? > > I will rebase on this set and send out patches for a detailed review. > > > > > TSM basically just becomes this weird overlay driver on the PCI device > > > that does stuff. Some of the stuff it might do: > > > - Register an attestation subsystem device to do SPDM > > > - Register to allow iommufd to create a viommu > > > - Some status sysfs ? > > > - ?? > > > > > So we may expand pci tsm to have more than one role? currently it has > > one. > > int pci_tsm_register(struct tsm_dev *tsm_dev) { > > ... > > roles = is_link_tsm(tsm_dev) + is_devsec_tsm(tsm_dev) + > > is_assignment_tsm(tsm_dev); > > if (roles != 1) > > return -EINVAL; > > Not sure what'd be a proper name for this, but it sounds to me that > it tries to over-abstract something into tsm. The reused logic related > to assignment or viommu is relatively small, so the other option below > sounds better if it can work. > > Or it may be the original provider framework that Aneesh proposed, > so tsm/MSHV/pKVM can each register its own backend... That is definately undesirable for TSM I think the very best answer for this is to get the viommu from the "kvm" fd, I just don't quite know how you implement it.. Maybe just register something like a notifier chain where the struct file * and the viommu type value goes in and a viommu object comes back out? Jason