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Mon, 09 Nov 2026 11:15:22 -0800 (PST) Received: from AERO17.taila7786d.ts.net ([45.95.212.227]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b3b5b20c55sm788478c88.8.2026.11.09.11.15.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 11:15:22 -0800 (PST) From: Pufan Jin To: Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring Cc: andrew@lunn.ch, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1 Date: Tue, 10 Nov 2026 03:15:15 +0800 Message-ID: <20261109191515.252449-1-cyan2254650260@gmail.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The LubanCat 4 PCB adds ~2ns of trace delay on both TXC and RXC, but that alone is not sufficient for reliable RGMII operation. With phy-mode = "rgmii" and zero MAC delays the link comes up at 1Gbps but drops ~90% of the packets; the PHY's internal TX/RX delay is required. Use phy-mode = "rgmii-id" and keep the MAC's default delays. With this configuration a direct link to another 1Gbps NIC passes 2GB in each direction with iperf3 at ~859-905Mbps, 0% packet loss, and no CRC or error counters. Fixes: 6d9430d58714 ("arm64: dts: rockchip: Add EmbedFire LubanCat 4 board") Signed-off-by: Pufan Jin --- arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts index 0d28c6165..a042aa702 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts @@ -168,12 +168,13 @@ &gmac1 { clock_in_out = "output"; phy-handle = <&rgmii_phy1>; /* - * The PCB adds ~2ns of trace delay on both TXC and RXC, so the - * required RGMII clock skew is provided by the board itself. - * Neither the MAC nor the PHY should add any internal delay, - * hence "rgmii" (not "rgmii-id") is correct here. + * The PCB adds ~2ns of trace delay on both TXC and RXC, but that + * alone is not sufficient for reliable RGMII operation: with + * "rgmii" and zero MAC delays the link shows ~90% packet loss. + * The PHY's internal TX/RX delay is required, so use "rgmii-id" + * and keep the MAC's default delays. */ - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; pinctrl-0 = <&gmac1_miim &gmac1_tx_bus2 &gmac1_rx_bus2 -- 2.56.0