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Tue, 10 Nov 2026 04:32:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1794285166; bh=3GqzT7SXZUXUviYJRJR+eWJ2kJqwUKNfSUL8dK6KjqY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To; b=f6fGGLdsLBvYbaMw0pk5B+GLv67csbQuODztRr5M7Ezm5a3BBmkuN4I5JxGlOIVxk wAwUVlfnj78VevhwUMTlPSPApwASHLhudQKSTOROZZt3+8E4s21IqvY1wtBd/Q2tdd h1Yo/ddTgJ7DlGgG0iWuuHA90QrYZcz2wXzhpc2M9nXPUDIgImGzxbPDVqREmj2+/H XRvNJKAlCG+1d7NdoQGsZJ1/PD3kr8fyRAY6vBq7Mrpp194oSACWBeYF+BzyIRfQNJ 280sn7hpe8XdNTUUSabMHutJd6Gm7nemCHPGyFSdxAsSqZYdL3wk1UlhtR7OucCqs7 MUUdexrMsrO3w== Received: from nexus.subspace.kernel.org (localhost [IPv6:::1]) by lkml.kernel.org (Postfix) with ESMTP id 8F8A648851; Tue, 10 Nov 2026 04:32:44 +0000 (UTC) From: Long Zhao via B4 Relay Date: Tue, 10 Nov 2026 12:32:26 +0800 Subject: [PATCH v14 01/14] dt-bindings: gpio: pl061: add Ambarella CV75 variant X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Message-Id: <20261110-cv75-gpio-v14-1-e586aad0467a@ambarella.com> References: <20261110-cv75-gpio-v14-0-e586aad0467a@ambarella.com> In-Reply-To: <20261110-cv75-gpio-v14-0-e586aad0467a@ambarella.com> To: Bartosz Golaszewski , linux-gpio@vger.kernel.org Cc: Linus Walleij , Michael Walle , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Krzysztof Kozlowski , Krzysztof Kozlowski , Conor Dooley , Mika Westerberg , devicetree@vger.kernel.org, Long Zhao , Long Zhao , linux-kernel@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1794285162; l=2175; i=longzhao@ambarella.com; s=20260730; h=from:subject:message-id; bh=ecrzSAMMaNZiFiJHNHyvnNwBNYVIUrMbREC+e46Wpqs=; b=H6GUr2Z/7COpyrIR13z6KmzvMPIPlforcPHrCAJALcgCcQehYUrJX9q5s0UzoE/BhFoYva+iA 2dik2rOoTXQDr7mbDNnyMX0h34AIrScO8BxJsNab/g/olOqLybRXLoV X-Developer-Key: i=longzhao@ambarella.com; a=ed25519; pk=/xGhPTOX0/eYsyTWzyjjgAIW1Z/YD+IlnOnvcdRozow= X-Endpoint-Received: by B4 Relay for longzhao@ambarella.com/20260730 with auth_id=903 X-Original-From: Long Zhao Reply-To: longzhao@ambarella.com Content-Transfer-Encoding: 7bit From: Long Zhao The CV75 GPIO is a modified PL061. The basic registers have the same names and roles (DAT/DIR/IS/IBE/IEV/IE/MIS/IC). Each bank is 32-bit and 32 lines and adds MASK and ENABLE, so it is not register-compatible with the ARM PL061 and arm,pl061 must not be used as a fallback. The AMBA core matches the PL061 driver by PrimeCell ID, not by the DT compatible string. These blocks do not implement the standard PL061 ID (0x00041061) in the ID registers, so arm,primecell-periphid is required and is fixed to 0x000e8061; the driver uses that ID to select the Ambarella layout. gpio-ranges is required because each bank is a slice of the SoC pinctrl pin space. Acked-by: Conor Dooley Reviewed-by: Linus Walleij Signed-off-by: Long Zhao --- .../devicetree/bindings/gpio/pl061-gpio.yaml | 25 +++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml index 4d970e55104b..c22dd8a1d2c1 100644 --- a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml @@ -15,7 +15,9 @@ select: properties: compatible: contains: - const: arm,pl061 + enum: + - arm,pl061 + - ambarella,cv75-gpio required: - compatible @@ -25,7 +27,9 @@ properties: compatible: items: - - const: arm,pl061 + - enum: + - ambarella,cv75-gpio + - arm,pl061 - const: arm,primecell reg: @@ -64,6 +68,21 @@ required: - "#gpio-cells" - gpio-controller -additionalProperties: false +allOf: + - $ref: /schemas/arm/primecell.yaml# + - if: + properties: + compatible: + contains: + const: ambarella,cv75-gpio + then: + properties: + arm,primecell-periphid: + const: 0x000e8061 + required: + - arm,primecell-periphid + - gpio-ranges + +unevaluatedProperties: false ... -- 2.34.1