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[211.23.39.77]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b3b5b2fc14sm5236759c88.12.2026.11.10.00.18.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2026 00:18:37 -0800 (PST) From: Jason Yang Date: Tue, 10 Nov 2026 16:18:08 +0800 Subject: [PATCH v6 5/9] phy: rockchip-samsung-dcphy: Move block-level setup to runtime resume X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261110-dcphy-rx-v1-v6-5-d681ba20b36a@gmail.com> References: <20261110-dcphy-rx-v1-v6-0-d681ba20b36a@gmail.com> In-Reply-To: <20261110-dcphy-rx-v1-v6-0-d681ba20b36a@gmail.com> To: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Guochun Huang , Philipp Zabel Cc: Michael Riesch , Sebastian Reichel , Bryan O'Donoghue , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jason Yang X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1794298692; l=2404; i=jason98166@gmail.com; s=20260721; h=from:subject:message-id; bh=mM+rLgEKgftG4Li8VSkT3B5/6VzsZyoCu0+g9BozRtQ=; b=MhBIYlgHOfxIY0JdSsH11bY+ntMFX2QUl/Z+iUhq/Sj47py5uFQSNEZQ1a0S+/TDMphNcVUxz /PMKTJMSDxOBRnNExGVQFfBDNfshgq7qCsOxLRZAFzlsGMu2EG+KYGb X-Developer-Key: i=jason98166@gmail.com; a=ed25519; pk=xQmD001Q/ooHl39PxyQtusbUQmgbOsSfpFryRVWZ/k4= The APB reset and the BIAS references have to be treated as block-level [1]: both the transmitter and the receiver need them, and they only have to be programmed once. They are programmed from the transmitter's power-on path today. A later change registers one struct phy for each of them, and a second consumer coming up would then reset the block underneath a PHY that is already running. Program them from runtime resume instead, where whichever of the two comes up first brings the block up and a second one no longer resets it. This puts the BIAS writes ahead of the per-PHY reset assert, where the TRM's worked example has them after [1]. That is safe: neither M_RESETN nor S_RESETN covers the BIAS registers, and the values written are those registers' reset defaults. [1] RK3588 TRM: sections 22.4.1 (address map), 22.4.2 (reset values), 22.6.1.2 (reset) and 22.6.4.1 (D-PHY transmitter start-up) Signed-off-by: Jason Yang --- drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c index 7a009d87a665..d6acc3e2d448 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c @@ -1346,7 +1346,6 @@ static int samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) reset_control_assert(samsung->m_phy_rst); - samsung_mipi_dcphy_bias_block_enable(samsung); samsung_mipi_dcphy_pll_configure(samsung); samsung_mipi_dphy_clk_lane_timing_init(samsung); samsung_mipi_dphy_data_lane_timing_init(samsung); @@ -1373,10 +1372,6 @@ static int samsung_mipi_dcphy_power_on(struct phy *phy) { struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy); - reset_control_assert(samsung->apb_rst); - udelay(1); - reset_control_deassert(samsung->apb_rst); - switch (samsung->type) { case PHY_TYPE_DPHY: return samsung_mipi_dphy_power_on(samsung); @@ -1667,6 +1662,12 @@ static __maybe_unused int samsung_mipi_dcphy_runtime_resume(struct device *dev) return ret; } + reset_control_assert(samsung->apb_rst); + udelay(1); + reset_control_deassert(samsung->apb_rst); + + samsung_mipi_dcphy_bias_block_enable(samsung); + return 0; } -- 2.43.0