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[211.23.39.77]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b3b5b2fc14sm5236759c88.12.2026.11.10.00.18.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2026 00:18:41 -0800 (PST) From: Jason Yang Date: Tue, 10 Nov 2026 16:18:09 +0800 Subject: [PATCH v6 6/9] phy: rockchip-samsung-dcphy: Name the transmitter helpers and ops X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261110-dcphy-rx-v1-v6-6-d681ba20b36a@gmail.com> References: <20261110-dcphy-rx-v1-v6-0-d681ba20b36a@gmail.com> In-Reply-To: <20261110-dcphy-rx-v1-v6-0-d681ba20b36a@gmail.com> To: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Guochun Huang , Philipp Zabel Cc: Michael Riesch , Sebastian Reichel , Bryan O'Donoghue , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jason Yang X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1794298692; l=9009; i=jason98166@gmail.com; s=20260721; h=from:subject:message-id; bh=/a13r8uSs6LEfL9vbTFaB55dpyKEbhdnf/mU3FYmZFQ=; b=b2zgm9Kj4Fr7H2StjoxXa1PdDsGlw8WyWimdFlb86ZfZfolTtkXFdwaYStfq/eL1+nH/r+nLq B25L8+ulrBbDP2qn2bSmObXR6cOcwceQ2yTuJCfmpYV6YkQADPkQrvq X-Developer-Key: i=jason98166@gmail.com; a=ed25519; pk=xQmD001Q/ooHl39PxyQtusbUQmgbOsSfpFryRVWZ/k4= The block is a combo PHY: it exposes a transmitter and a receiver, and a later change registers one struct phy for each. Prepare for that. Give every helper that programs the master lanes a tx_ prefix, and move the phy pointer and the lane count, which only the transmitter uses, into a struct samsung_mipi_phy that the receiver can have one of too. Name the phy_ops and its callbacks after the transmitter as well, so that the receiver can bring its own rather than share these. The BIAS block and the PLL keep their names: the TRM puts both in the part common to the whole block [1], so neither belongs to one PHY even though only the transmitter drives the PLL. No functional change intended. [1] RK3588 TRM: sections 22.3.1 (bias generator), 22.3.2 (PLL) and 22.4.1 (address map) Signed-off-by: Jason Yang Reviewed-by: Michael Riesch --- drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c | 67 ++++++++++++----------- 1 file changed, 36 insertions(+), 31 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c index d6acc3e2d448..c40c84791eca 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c @@ -280,6 +280,11 @@ struct samsung_mipi_dcphy_plat_data { u32 dphy_tx_max_lane_kbps; }; +struct samsung_mipi_phy { + struct phy *phy; + unsigned int lanes; +}; + struct samsung_mipi_dcphy { struct device *dev; struct clk *ref_clk; @@ -290,8 +295,7 @@ struct samsung_mipi_dcphy { struct reset_control *s_phy_rst; struct reset_control *apb_rst; struct reset_control *grf_apb_rst; - unsigned int lanes; - struct phy *phy; + struct samsung_mipi_phy tx; u8 type; const struct samsung_mipi_dcphy_plat_data *pdata; @@ -989,13 +993,13 @@ static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *sams I_MUX_SEL_MASK, I_MUX_400MV); } -static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung) +static void samsung_mipi_dphy_tx_lane_enable(struct samsung_mipi_dcphy *samsung) { regmap_write(samsung->regmap, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000)); regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0, PHY_ENABLE, PHY_ENABLE); - switch (samsung->lanes) { + switch (samsung->tx.lanes) { case 4: regmap_write(samsung->regmap, DPHY_MD3_GNR_CON1, T_PHY_READY(0x2000)); @@ -1024,9 +1028,9 @@ static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung) } } -static void samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy *samsung) +static void samsung_mipi_dphy_tx_lane_disable(struct samsung_mipi_dcphy *samsung) { - switch (samsung->lanes) { + switch (samsung->tx.lanes) { case 4: regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0, PHY_ENABLE, 0); @@ -1101,7 +1105,7 @@ static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung) } static const struct samsung_mipi_dphy_timing * -samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy *samsung) +samsung_mipi_dphy_tx_get_timing(struct samsung_mipi_dcphy *samsung) { const struct samsung_mipi_dphy_timing *timings; unsigned int num_timings; @@ -1208,13 +1212,13 @@ samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy *samsung, } static void -samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung) +samsung_mipi_dphy_tx_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung) { const struct samsung_mipi_dphy_timing *timing; unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); u32 val, res_up, res_down; - timing = samsung_mipi_dphy_get_timing(samsung); + timing = samsung_mipi_dphy_tx_get_timing(samsung); regmap_write(samsung->regmap, DPHY_MC_GNR_CON0, 0xf000); /* @@ -1269,13 +1273,13 @@ samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung) } static void -samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung) +samsung_mipi_dphy_tx_data_lane_timing_init(struct samsung_mipi_dcphy *samsung) { const struct samsung_mipi_dphy_timing *timing; unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); u32 val, res_up, res_down; - timing = samsung_mipi_dphy_get_timing(samsung); + timing = samsung_mipi_dphy_tx_get_timing(samsung); /* * The Drive-Strength / Voltage-Amplitude is adjusted by adjusting the @@ -1340,15 +1344,15 @@ samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung) regmap_write(samsung->regmap, DPHY_MD3_TIME_CON4, 0x1f4); } -static int samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) +static int samsung_mipi_dphy_tx_power_on(struct samsung_mipi_dcphy *samsung) { int ret; reset_control_assert(samsung->m_phy_rst); samsung_mipi_dcphy_pll_configure(samsung); - samsung_mipi_dphy_clk_lane_timing_init(samsung); - samsung_mipi_dphy_data_lane_timing_init(samsung); + samsung_mipi_dphy_tx_clk_lane_timing_init(samsung); + samsung_mipi_dphy_tx_data_lane_timing_init(samsung); ret = samsung_mipi_dcphy_pll_enable(samsung); if (ret < 0) { samsung_mipi_dcphy_pll_disable(samsung); @@ -1356,7 +1360,7 @@ static int samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) return ret; } - samsung_mipi_dphy_lane_enable(samsung); + samsung_mipi_dphy_tx_lane_enable(samsung); reset_control_deassert(samsung->m_phy_rst); @@ -1368,13 +1372,13 @@ static int samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) return 0; } -static int samsung_mipi_dcphy_power_on(struct phy *phy) +static int samsung_mipi_dcphy_tx_power_on(struct phy *phy) { struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy); switch (samsung->type) { case PHY_TYPE_DPHY: - return samsung_mipi_dphy_power_on(samsung); + return samsung_mipi_dphy_tx_power_on(samsung); default: /* CPHY part to be implemented later */ return -EOPNOTSUPP; @@ -1383,13 +1387,13 @@ static int samsung_mipi_dcphy_power_on(struct phy *phy) return 0; } -static int samsung_mipi_dcphy_power_off(struct phy *phy) +static int samsung_mipi_dcphy_tx_power_off(struct phy *phy) { struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy); switch (samsung->type) { case PHY_TYPE_DPHY: - samsung_mipi_dphy_lane_disable(samsung); + samsung_mipi_dphy_tx_lane_disable(samsung); break; default: /* CPHY part to be implemented later */ @@ -1488,13 +1492,13 @@ samsung_mipi_dcphy_pll_calc_rate(struct samsung_mipi_dcphy *samsung, } } -static int samsung_mipi_dcphy_configure(struct phy *phy, - union phy_configure_opts *opts) +static int samsung_mipi_dcphy_tx_configure(struct phy *phy, + union phy_configure_opts *opts) { struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy); unsigned long long target_rate = opts->mipi_dphy.hs_clk_rate; - samsung->lanes = opts->mipi_dphy.lanes > 4 ? 4 : opts->mipi_dphy.lanes; + samsung->tx.lanes = opts->mipi_dphy.lanes > 4 ? 4 : opts->mipi_dphy.lanes; samsung_mipi_dcphy_pll_calc_rate(samsung, target_rate); opts->mipi_dphy.hs_clk_rate = samsung->pll.rate; @@ -1518,10 +1522,10 @@ static int samsung_mipi_dcphy_exit(struct phy *phy) return 0; } -static const struct phy_ops samsung_mipi_dcphy_ops = { - .configure = samsung_mipi_dcphy_configure, - .power_on = samsung_mipi_dcphy_power_on, - .power_off = samsung_mipi_dcphy_power_off, +static const struct phy_ops samsung_mipi_dcphy_tx_ops = { + .configure = samsung_mipi_dcphy_tx_configure, + .power_on = samsung_mipi_dcphy_tx_power_on, + .power_off = samsung_mipi_dcphy_tx_power_off, .init = samsung_mipi_dcphy_init, .exit = samsung_mipi_dcphy_exit, .owner = THIS_MODULE, @@ -1551,7 +1555,7 @@ static struct phy *samsung_mipi_dcphy_xlate(struct device *dev, samsung->type = args->args[0]; - return samsung->phy; + return samsung->tx.phy; } static int samsung_mipi_dcphy_probe(struct platform_device *pdev) @@ -1620,11 +1624,12 @@ static int samsung_mipi_dcphy_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "Failed to enable runtime PM\n"); - samsung->phy = devm_phy_create(dev, NULL, &samsung_mipi_dcphy_ops); - if (IS_ERR(samsung->phy)) - return dev_err_probe(dev, PTR_ERR(samsung->phy), "Failed to create MIPI DC-PHY\n"); + samsung->tx.phy = devm_phy_create(dev, NULL, &samsung_mipi_dcphy_tx_ops); + if (IS_ERR(samsung->tx.phy)) + return dev_err_probe(dev, PTR_ERR(samsung->tx.phy), + "Failed to create MIPI DC-PHY transmitter\n"); - phy_set_drvdata(samsung->phy, samsung); + phy_set_drvdata(samsung->tx.phy, samsung); phy_provider = devm_of_phy_provider_register(dev, samsung_mipi_dcphy_xlate); if (IS_ERR(phy_provider)) -- 2.43.0