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charset="utf-8" Message-Id: <20261110-hantro-robust-v1-5-6b6269c05bfa@gmail.com> References: <20261110-hantro-robust-v1-0-6b6269c05bfa@gmail.com> In-Reply-To: <20261110-hantro-robust-v1-0-6b6269c05bfa@gmail.com> To: Nicolas Dufresne , Benjamin Gaignard , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Nicolas Frattaroli , Andrzej Pietrasiewicz , Ezequiel Garcia , Hans Verkuil , Jernej Skrabec Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1794295050; l=2157; i=aiyengar1990@gmail.com; s=20261110; h=from:subject:message-id; bh=oSfnGMWy5zf5A4EBvJXXAsGPhbLth5ASXA2aC2mihFA=; b=WRrPPMCfNRPj4F9cCnVxEwsaS7zHXGHQgm/SiJD6oKZrWvBoL6PKc6M9sxAP7ZT9gSKt2Z2by o69VnP0/EEzDl1Ic9vhqLlHaQLutQ9SI3LAk/QRudkt75zT0NNpzy2R X-Developer-Key: i=aiyengar1990@gmail.com; a=ed25519; pk=zXpRgUTrhaFe6jLyPqbBy3ccfkj04w0g2690Wv3mg+0= X-Endpoint-Received: by B4 Relay for aiyengar1990@gmail.com/20261110 with auth_id=1480 X-Original-From: Arun Iyengar Reply-To: aiyengar1990@gmail.com Content-Transfer-Encoding: 7bit From: Arun Iyengar Describe the AXI and AHB reset lines of the four VEPU121 JPEG encoder cores, so that the driver can reset a core that is stuck after a fault of its IOMMU. The IOMMU of each core sits in the same register block and is clocked by the same clocks, so these resets likely cover its bus interface as well. This relies on the driver not leaving a VPU behind an IOMMU in reset after remove ("media: verisilicon: Don't hold a VPU behind an IOMMU in reset after remove"). Signed-off-by: Arun Iyengar --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi index aa69fd3793fd..227465d446a2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1325,6 +1325,8 @@ vepu121_0: video-codec@fdba0000 { clock-names = "aclk", "hclk"; iommus = <&vepu121_0_mmu>; power-domains = <&power RK3588_PD_VDPU>; + resets = <&cru SRST_A_JPEG_ENCODER0>, <&cru SRST_H_JPEG_ENCODER0>; + reset-names = "axi", "ahb"; }; vepu121_0_mmu: iommu@fdba0800 { @@ -1345,6 +1347,8 @@ vepu121_1: video-codec@fdba4000 { clock-names = "aclk", "hclk"; iommus = <&vepu121_1_mmu>; power-domains = <&power RK3588_PD_VDPU>; + resets = <&cru SRST_A_JPEG_ENCODER1>, <&cru SRST_H_JPEG_ENCODER1>; + reset-names = "axi", "ahb"; }; vepu121_1_mmu: iommu@fdba4800 { @@ -1365,6 +1369,8 @@ vepu121_2: video-codec@fdba8000 { clock-names = "aclk", "hclk"; iommus = <&vepu121_2_mmu>; power-domains = <&power RK3588_PD_VDPU>; + resets = <&cru SRST_A_JPEG_ENCODER2>, <&cru SRST_H_JPEG_ENCODER2>; + reset-names = "axi", "ahb"; }; vepu121_2_mmu: iommu@fdba8800 { @@ -1385,6 +1391,8 @@ vepu121_3: video-codec@fdbac000 { clock-names = "aclk", "hclk"; iommus = <&vepu121_3_mmu>; power-domains = <&power RK3588_PD_VDPU>; + resets = <&cru SRST_A_JPEG_ENCODER3>, <&cru SRST_H_JPEG_ENCODER3>; + reset-names = "axi", "ahb"; }; vepu121_3_mmu: iommu@fdbac800 { -- 2.55.0