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a=openpgp; fpr=EEC0DB858E66C0DA70620AC07DBD6AC74DE29324 ti,hwmods is deprecated, and the power management there is working a bit different than the one in the ti-sysc way. So if something is changed with pm incfluence, it has to be tested on both. To reduce that maintenance work, convert to ti-sysc. Also fixes an actual crash with OMAP3 and suspend. That was caused by a commit enabling i2c access in later phases of suspend until the noirq phase. But that causes some state expectation mismatch between omap_device.c code and the i2c code leading to the following: Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa060004 [...] PC is at omap_i2c_runtime_suspend+0x1c/0xd8 [...] Call trace: omap_i2c_runtime_suspend from _od_suspend_noirq+0x44/0xe0 _od_suspend_noirq from dpm_run_callback+0x4c/0x1f0 dpm_run_callback from device_suspend_noirq+0x208/0x594 device_suspend_noirq from dpm_suspend_noirq+0x1c8/0x3a4 dpm_suspend_noirq from suspend_devices_and_enter+0x10c/0x840 suspend_devices_and_enter from pm_suspend+0x25c/0x3fc pm_suspend from state_store+0x114/0x130 Fixes: 7da7fd7e66ac9 ("i2c: omap: wakeup the controller during suspend() callback") Signed-off-by: Andreas Kemnade --- arch/arm/boot/dts/ti/omap/omap3.dtsi | 96 +++++++++++++++++++++++++++++------- 1 file changed, 78 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/ti/omap/omap3.dtsi b/arch/arm/boot/dts/ti/omap/omap3.dtsi index 447736d2e53ca..2ee5fd4888ce5 100644 --- a/arch/arm/boot/dts/ti/omap/omap3.dtsi +++ b/arch/arm/boot/dts/ti/omap/omap3.dtsi @@ -396,31 +396,91 @@ uart3: serial@49020000 { clock-frequency = <48000000>; }; - i2c1: i2c@48070000 { - compatible = "ti,omap3-i2c"; - reg = <0x48070000 0x80>; - interrupts = <56>; + i2c1_target: target-module@48070000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x48070000 0x4>, + <0x48070020 0x4>, + <0x48070010 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&i2c1_fck>, <&i2c1_ick>; + clock-names = "fck", "ick"; #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c1"; + #size-cells = <1>; + ranges = <0 0x48070000 0x1000>; + + i2c1: i2c@0 { + compatible = "ti,omap3-i2c"; + reg = <0x0 0x80>; + interrupts = <56>; + #address-cells = <1>; + #size-cells = <0>; + }; }; - i2c2: i2c@48072000 { - compatible = "ti,omap3-i2c"; - reg = <0x48072000 0x80>; - interrupts = <57>; + i2c2_target: target-module@48072000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x48072000 0x4>, + <0x48072020 0x4>, + <0x48072010 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&i2c2_fck>, <&i2c2_ick>; + clock-names = "fck", "ick"; #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c2"; + #size-cells = <1>; + ranges = <0 0x48072000 0x1000>; + + i2c2: i2c@0 { + compatible = "ti,omap3-i2c"; + reg = <0x0 0x80>; + interrupts = <57>; + #address-cells = <1>; + #size-cells = <0>; + }; }; - i2c3: i2c@48060000 { - compatible = "ti,omap3-i2c"; - reg = <0x48060000 0x80>; - interrupts = <61>; + i2c3_target: target-module@48060000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x48060000 0x4>, + <0x48060020 0x4>, + <0x48060010 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&i2c3_fck>, <&i2c3_ick>; + clock-names = "fck", "ick"; #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c3"; + #size-cells = <1>; + ranges = <0 0x48060000 0x1000>; + + i2c3: i2c@0 { + compatible = "ti,omap3-i2c"; + reg = <0x0 0x80>; + interrupts = <61>; + #address-cells = <1>; + #size-cells = <0>; + }; }; mailbox: mailbox@48094000 { -- 2.47.3