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[129.46.232.65]) by smtp.gmail.com with ESMTPSA id af79cd13be357-9479e73b2d2sm138653985a.10.2026.11.09.20.55.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 20:55:52 -0800 (PST) From: Yongxing Mou Date: Tue, 10 Nov 2026 12:54:37 +0800 Subject: [PATCH v8 16/29] drm/msm/dpu: add per-stream MST encoders X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261110-msm-dp-mst-v8-16-d040fb33db5f@oss.qualcomm.com> References: <20261110-msm-dp-mst-v8-0-d040fb33db5f@oss.qualcomm.com> In-Reply-To: <20261110-msm-dp-mst-v8-0-d040fb33db5f@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Jessica Zhang Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Yongxing Mou , Abhinav Kumar X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1794286469; l=5908; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=y5jRzeNla1e8Iwt1s5LRc06RYsVeZV4O7u84IZgL2qk=; b=OMiZVYKrorqRLdXt0pB2BcKW+8Rfcnq1n5wPUzOTOnM+aq6+4uuxSnfetnEni0UVjZ5X5PpPq 35lD1huP+QXDC2Kb6P3jggv2OVad2pJKwAsqN9aaUVc9WB5sfqv9W6E X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Authority-Analysis: v=2.4 cv=TMjQ2Fla c=1 sm=1 tr=0 ts=6af2a3da cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=aoVTMipVTiCx4Xnk7jUA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEwMDAxOSBTYWx0ZWRfX6yCVr1703rw/ Z9l7HriCezTZLIy1wd2xN0xOmpCRiFQ0Qy2rg1J6MWIaAurs0oe88vSB6kYNtCGMGjsWVH/vuSN x0eD3VF+aEiOygv/ELI+iBZtZ5Xjx2RzqKLgeSJc8cBBYLvQVAmTH6E7/BeCi6FmpuXQ3tfx8B7 8qqd1WbMRi7FvWMRYfOtQmbTRYS1dar/TdsKg0zMypggXEEWXRZIA13KmIbaTp7n/Ht+DfFuZ7o Hxzm3plWbFB02rxCHquaqeZxGKPhgPnDE0UCGnPYZZL7QG2KjA9Ij1c5XYgDZ1+nBEflFb660ss RGRuUldHeYaw20MhlX8j9jR+DiWAA4qbRRXKkCuf0PzjkNsw+LDkYg67ioeeg8hKfqLT2HjQ+co S6iu3uC0dOEgZCTW0OYDSJClRHx6D5DKiT4/CRDzThiiO5S/zpQENp1tR5FBVqVN3gyccelHVrQ qZQNFjl075yJxWQL4xg== X-Proofpoint-GUID: YwaHLrJOforlSJaga3AyNX6y5h7FXeC6 X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEwMDAxOSBTYWx0ZWRfX2dVRt01bH3vM lmk/gQocFtOxvVi04733dF8DpbvG6i5s+e+OJR20mStv/abB+PcjH5boI8bcYCaQWzp1OZFRkbf Vo/DDQVR5DD7SmViQGouFuxGdycmh+E= X-Proofpoint-ORIG-GUID: YwaHLrJOforlSJaga3AyNX6y5h7FXeC6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-10_02,2026-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 phishscore=0 priorityscore=1501 spamscore=0 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611100019 Unlike SST, where a DP controller is represented by a single encoder, MST requires an encoder instance for each stream. Create one DRM encoder per MST stream, associate it with a stream ID, and initialize it with MST-specific encoder helper callbacks. This establishes the per-stream encoder infrastructure required for DP MST support. Signed-off-by: Abhinav Kumar Signed-off-by: Yongxing Mou --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 23 ++++++++++++++++++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 15 +++++++++++++++ drivers/gpu/drm/msm/dp/dp_mst_drm.c | 20 ++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_mst_drm.h | 2 ++ drivers/gpu/drm/msm/msm_drv.h | 9 +++++++++ 5 files changed, 68 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index a8dcc8c684eb..802cb62fc010 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2742,6 +2742,24 @@ static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = { .atomic_enable = dpu_encoder_virt_atomic_enable, }; +static void dpu_encoder_mst_atomic_enable(struct drm_encoder *enc, + struct drm_atomic_commit *state) +{ + dpu_encoder_virt_atomic_enable(enc, state); +} + +static void dpu_encoder_mst_atomic_disable(struct drm_encoder *enc, + struct drm_atomic_commit *state) +{ + dpu_encoder_virt_atomic_disable(enc, state); +} + +static const struct drm_encoder_helper_funcs dpu_mst_encoder_helper_funcs = { + .atomic_mode_set = dpu_encoder_virt_atomic_mode_set, + .atomic_enable = dpu_encoder_mst_atomic_enable, + .atomic_disable = dpu_encoder_mst_atomic_disable, +}; + static const struct drm_encoder_funcs dpu_encoder_funcs = { .debugfs_init = dpu_encoder_debugfs_init, }; @@ -2767,7 +2785,10 @@ struct drm_encoder *dpu_encoder_init(struct drm_device *dev, if (IS_ERR(dpu_enc)) return ERR_CAST(dpu_enc); - drm_encoder_helper_add(&dpu_enc->base, &dpu_encoder_helper_funcs); + if (drm_enc_mode == DRM_MODE_ENCODER_DPMST) + drm_encoder_helper_add(&dpu_enc->base, &dpu_mst_encoder_helper_funcs); + else + drm_encoder_helper_add(&dpu_enc->base, &dpu_encoder_helper_funcs); spin_lock_init(&dpu_enc->enc_spinlock); dpu_enc->enabled = false; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 3c3203ca32c7..92691d39dcb2 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -688,6 +688,21 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev, return rc; } } + + for (int stream_id = 0; stream_cnt > 1 && stream_id < stream_cnt; stream_id++) { + info.stream_id = stream_id; + encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DPMST, &info); + if (IS_ERR(encoder)) { + DPU_ERROR("encoder init failed for dp mst display\n"); + return PTR_ERR(encoder); + } + + rc = msm_dp_mst_attach_encoder(priv->kms->dp[i], stream_id, encoder); + if (rc) { + DPU_ERROR("dp_mst attach_encoder failed, rc = %d\n", rc); + return rc; + } + } } return 0; diff --git a/drivers/gpu/drm/msm/dp/dp_mst_drm.c b/drivers/gpu/drm/msm/dp/dp_mst_drm.c index a2900ff3b0ab..ef5fb70863b8 100644 --- a/drivers/gpu/drm/msm/dp/dp_mst_drm.c +++ b/drivers/gpu/drm/msm/dp/dp_mst_drm.c @@ -147,6 +147,26 @@ static int msm_dp_mst_encoder_stream_id(struct msm_dp_mst *mst, return -1; } +int msm_dp_mst_attach_encoder(struct msm_dp *dp_display, unsigned int stream_id, + struct drm_encoder *encoder) +{ + struct msm_dp_mst *mst = dp_display->msm_dp_mst; + struct msm_dp_panel *dp_panel; + + dp_panel = msm_dp_display_get_panel(dp_display, stream_id); + if (!dp_panel) { + drm_err(dp_display->drm_dev, + "[MST] failed to allocate panel for stream %d\n", stream_id); + return -ENOMEM; + } + + mst->mst_encoders[stream_id].enc = encoder; + mst->mst_encoders[stream_id].stream_id = stream_id; + mst->mst_encoders[stream_id].dp_panel = dp_panel; + + return 0; +} + static struct drm_encoder * msm_dp_mst_atomic_best_encoder(struct drm_connector *connector, struct drm_atomic_commit *state) { diff --git a/drivers/gpu/drm/msm/dp/dp_mst_drm.h b/drivers/gpu/drm/msm/dp/dp_mst_drm.h index 7f35e7524cfd..3cbd2a674675 100644 --- a/drivers/gpu/drm/msm/dp/dp_mst_drm.h +++ b/drivers/gpu/drm/msm/dp/dp_mst_drm.h @@ -9,5 +9,7 @@ int msm_dp_mst_mgr_init(struct msm_dp *dp_display, u32 max_streams, struct drm_dp_aux *drm_aux); void msm_dp_mst_mgr_destroy(struct msm_dp *dp_display); +int msm_dp_mst_attach_encoder(struct msm_dp *dp_display, unsigned int stream_id, + struct drm_encoder *encoder); #endif /* _DP_MST_DRM_H_ */ diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 31ab50f620bc..cc665888ce7f 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -360,6 +360,8 @@ bool msm_dp_wide_bus_available(const struct msm_dp *dp_display); int msm_dp_get_mst_max_stream(struct msm_dp *dp_display); int msm_dp_mst_register(struct msm_dp *dp_display); void msm_dp_mst_unregister(struct msm_dp *dp_display); +int msm_dp_mst_attach_encoder(struct msm_dp *dp_display, unsigned int stream_id, + struct drm_encoder *encoder); #else static inline int __init msm_dp_register(void) @@ -406,6 +408,13 @@ static inline void msm_dp_mst_unregister(struct msm_dp *dp_display) { } +static inline int msm_dp_mst_attach_encoder(struct msm_dp *dp_display, + unsigned int stream_id, + struct drm_encoder *encoder) +{ + return -EINVAL; +} + #endif #ifdef CONFIG_DRM_MSM_MDP4 -- 2.43.0