From: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Jessica Zhang <jesszhan0024@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Yongxing Mou <yongxing.mou@oss.qualcomm.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>
Subject: [PATCH v8 02/29] drm/msm/dp: add support to send ACT packets for MST
Date: Tue, 10 Nov 2026 12:54:23 +0800 [thread overview]
Message-ID: <20261110-msm-dp-mst-v8-2-d040fb33db5f@oss.qualcomm.com> (raw)
In-Reply-To: <20261110-msm-dp-mst-v8-0-d040fb33db5f@oss.qualcomm.com>
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
Whenever virtual channel slot allocation changes, the DP
source must send the action control trigger sequence to notify
the sink about the same. This would be applicable during the
start and stop of the pixel stream. Add the infrastructure
to be able to send ACT packets for the DP controller when
operating in MST mode.
Add REG_DP_MST_ACT, the ACT trigger register used by this sequence.
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 44 ++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/msm/dp/dp_ctrl.h | 5 ++++-
drivers/gpu/drm/msm/dp/dp_display.c | 3 ++-
drivers/gpu/drm/msm/dp/dp_display.h | 1 +
drivers/gpu/drm/msm/dp/dp_reg.h | 1 +
5 files changed, 51 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 32d4d5743eb36..288f84c33275f 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -142,6 +142,7 @@ struct msm_dp_ctrl_private {
bool core_clks_on;
bool link_clks_on;
bool stream_clks_on[DP_STREAM_MAX];
+ bool mst_mode;
};
static inline u32 msm_dp_read_ahb(const struct msm_dp_ctrl_private *ctrl, u32 offset)
@@ -244,6 +245,37 @@ static int msm_dp_aux_link_configure(struct drm_dp_aux *aux,
return err;
}
+int msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl,
+ struct msm_dp_panel *panel)
+{
+ struct msm_dp_ctrl_private *ctrl;
+ const struct drm_display_mode *mode;
+ u32 frame_time_ms;
+
+ ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctrl);
+
+ if (!ctrl->mst_mode)
+ return 0;
+
+ mode = &panel->msm_dp_mode.drm_mode;
+ frame_time_ms = DIV_ROUND_UP_ULL((u64)mode->htotal * mode->vtotal,
+ mode->clock) + 1;
+
+ msm_dp_write_link(ctrl, REG_DP_MST_ACT, 0x1);
+ /* make sure ACT signal is performed */
+ wmb();
+
+ msleep(frame_time_ms);
+
+ /* Hardware clears this bit after sending 4 ACT headers */
+ if (msm_dp_read_link(ctrl, REG_DP_MST_ACT)) {
+ drm_dbg_dp(ctrl->drm_dev, "MST ACT trigger complete failed\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
/*
* NOTE: resetting DP controller will also clear any pending HPD related interrupts
*/
@@ -2623,7 +2655,8 @@ int msm_dp_ctrl_prepare_stream_on(struct msm_dp_ctrl *msm_dp_ctrl,
return ret;
}
-int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *panel)
+int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *panel,
+ bool mst_active)
{
int ret = 0;
bool mainlink_ready = false;
@@ -2635,6 +2668,8 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *
ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctrl);
+ ctrl->mst_mode = mst_active;
+
pixel_rate = panel->msm_dp_mode.drm_mode.clock;
if (msm_dp_ctrl->wide_bus_en || panel->msm_dp_mode.out_fmt_is_yuv_420)
@@ -2666,6 +2701,10 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *
msm_dp_write_link(ctrl, REG_DP_STATE_CTRL, DP_STATE_CTRL_SEND_VIDEO);
+ ret = msm_dp_ctrl_mst_send_act(msm_dp_ctrl, panel);
+ if (ret)
+ return ret;
+
ret = msm_dp_ctrl_wait4video_ready(ctrl);
if (ret)
return ret;
@@ -2703,6 +2742,8 @@ void msm_dp_ctrl_off_link(struct msm_dp_ctrl *msm_dp_ctrl,
msm_dp_ctrl_reset(&ctrl->msm_dp_ctrl, panel);
+ ctrl->mst_mode = false;
+
msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl);
phy_power_off(phy);
@@ -2882,6 +2923,7 @@ struct msm_dp_ctrl *msm_dp_ctrl_get(struct device *dev, struct msm_dp_link *link
ctrl->link_base = link_base;
ctrl->mst2link_base = mst2link_base;
ctrl->mst3link_base = mst3link_base;
+ ctrl->mst_mode = false;
ret = msm_dp_ctrl_clk_init(&ctrl->msm_dp_ctrl);
if (ret) {
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h
index 80d9258501b49..41a69447001cd 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.h
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h
@@ -18,7 +18,8 @@ struct phy;
int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl,
struct msm_dp_panel *panel);
-int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *panel);
+int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *panel,
+ bool mst_active);
int msm_dp_ctrl_prepare_stream_on(struct msm_dp_ctrl *msm_dp_ctrl,
struct msm_dp_panel *panel,
bool force_link_train);
@@ -59,4 +60,6 @@ void msm_dp_ctrl_disable_irq(struct msm_dp_ctrl *msm_dp_ctrl);
void msm_dp_ctrl_reinit_phy(struct msm_dp_ctrl *msm_dp_ctrl);
bool msm_dp_ctrl_stream_clks_on(struct msm_dp_ctrl *dp_ctrl,
enum msm_dp_stream_id stream_id);
+int msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl,
+ struct msm_dp_panel *panel);
#endif /* _DP_CTRL_H_ */
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index ed899fcc91891..4862d0b42f290 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -679,7 +679,7 @@ static int msm_dp_display_enable(struct msm_dp_display_private *dp,
return 0;
}
- rc = msm_dp_ctrl_on_stream(dp->ctrl, msm_dp_panel);
+ rc = msm_dp_ctrl_on_stream(dp->ctrl, msm_dp_panel, msm_dp_display->mst_active);
if (!rc)
msm_dp_display->power_on = true;
@@ -1525,6 +1525,7 @@ void msm_dp_display_atomic_disable(struct msm_dp *dp)
return;
msm_dp_ctrl_push_idle(msm_dp_display->ctrl);
+ msm_dp_ctrl_mst_send_act(msm_dp_display->ctrl, msm_dp_display->panel);
}
static void msm_dp_display_unprepare(struct msm_dp_display_private *dp)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
index 83117e7619f31..472429d092009 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -19,6 +19,7 @@ struct msm_dp {
struct drm_bridge *bridge;
bool audio_enabled;
bool power_on;
+ bool mst_active;
unsigned int connector_type;
bool is_edp;
diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
index 265da58e064cc..9263e61c794c8 100644
--- a/drivers/gpu/drm/msm/dp/dp_reg.h
+++ b/drivers/gpu/drm/msm/dp/dp_reg.h
@@ -330,6 +330,7 @@
#define MMSS_DP1_SDP_CFG3 (0x000004e8)
#define REG_DP_DP0_RG (0x000004f8)
#define REG_DP_DP1_RG (0x000004fc)
+#define REG_DP_MST_ACT (0x00000500)
#define MMSS_DP_BIST_ENABLE (0x00000000)
#define DP_BIST_ENABLE_DPBIST_EN (0x00000001)
--
2.43.0
next prev parent reply other threads:[~2026-11-10 4:54 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 4:54 [PATCH v8 00/29] drm/msm/dp: Add MST support for MSM chipsets Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 01/29] drm/msm/dp: skip sink requests while the mainlink clocks are off Yongxing Mou
2026-11-10 4:54 ` Yongxing Mou [this message]
2026-11-10 4:54 ` [PATCH v8 03/29] drm/msm/dp: add support to enable MST in mainlink control Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 04/29] drm/msm/dp: no need to update tu calculation for mst Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 05/29] drm/msm/dp: always program MST_FIFO_CONSTANT_FILL for MST use cases Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 06/29] drm/msm/dp: add support for sending VCPF packets in DP controller Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 07/29] drm/msm/dp: add support for MST channel slot allocation Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 08/29] drm/msm/dp: replace power_on with active_stream_mask Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 09/29] drm/msm/dp: factor out _helper variants of bridge ops accepting a panel Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 10/29] drm/msm/dp: add link_ready to manage link-level operations Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 11/29] drm/msm/dp: add msm_dp_display_get_panel() to initialize DP panel Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 12/29] drm/msm/dp: introduce dp_mst_drm module Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 13/29] drm/msm/dp: add MST connector creation and topology callbacks Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 14/29] drm/msm/dpu: pass msm_display_info to dpu_encoder_get_intf() Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 15/29] drm/msm/dpu: use stream_id to select MST interfaces Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 16/29] drm/msm/dpu: add per-stream MST encoders Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 17/29] drm/msm/dp: move link capabilities to dp_link Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 18/29] drm/msm/dp: add atomic stream handling for MST Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 19/29] drm/bridge_connector: suppress hotplug for IRQ_HPD without status changes Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 20/29] drm/bridge_connector: avoid detect-based HPD notifications for DisplayPort Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 21/29] drm/msm/dp: add HPD callback for dp MST Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 22/29] drm/msm/dp: wire MST helpers into atomic check and commit paths Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 23/29] drm/msm/dp: mark the SST bridge disconnected when mst is active Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 24/29] drm/msm/dp: enable MST on capable sinks Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 25/29] drm/msm/dp: mark the SST bridge disconnected when an MST-capable sink is present Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 26/29] drm/msm/dp: wake threaded handler for HPD IRQs Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 27/29] drm/msm/dp: ignore IRQ HPD latched together with an unplug Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 28/29] drm/msm/dp: select MST stream bpp during atomic check Yongxing Mou
2026-11-10 4:54 ` [PATCH v8 29/29] soc: qcom: pmic-glink-altmode: skip retimer reset on DP IRQ Yongxing Mou
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