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Nova-core's falcon DMA loading method currently only supports loading from a DMA object that the driver has allocated, so there is no way to copy an image from framebuffer memory that an event supplied. Address this by making the source of a falcon DMA transfer an enum, which can be either a DMA object, or a GPU framebuffer address. The framebuffer address source has no user yet, but will be used by the r000 boot protocol. Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/falcon.rs | 45 +++++++++++++++++++++++++++-------------- 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index 04da14d48895..facf65a17c0f 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -140,6 +140,15 @@ pub(crate) enum FalconMem { Dmem { tag: bool }, } +/// Where a falcon DMA transfer reads from. +pub(crate) enum FalconDmaSource<'a> { + /// A DMA object in system memory. + Sysmem(&'a Coherent<'a, [u8]>), + /// GPU framebuffer memory at physical address `base`. + #[expect(dead_code)] + Framebuffer { base: u64 }, +} + bounded_enum! { /// Defines the Framebuffer Interface (FBIF) aperture type. /// This determines the memory type for external memory access during a DMA transfer, which is @@ -544,13 +553,10 @@ pub(crate) fn with_fbif_transcfg( Ok(result) } - /// Perform a DMA write according to `load_offsets` from `dma_obj` into the falcon's - /// `target_mem`. - /// - /// `sec` is set if the loaded firmware is expected to run in secure mode. + /// Perform a DMA write according to `load_offsets` from `src` into the falcon's `target_mem`. fn dma_wr( &self, - dma_obj: &Coherent<'_, [u8]>, + src: FalconDmaSource<'_>, target_mem: FalconMem, load_offsets: FalconDmaLoadTarget, ) -> Result { @@ -571,15 +577,20 @@ fn dma_wr( FalconMem::Dmem { tag: false } => (0, usize::from_safe_cast(load_offsets.src_start)), }; - let dma_base = { - // Upper limit of transfer is `(num_transfers * DMA_LEN) + load_offsets.src_start`. - let end_offset = num_transfers - .checked_mul(DMA_LEN) - .and_then(|size| size.checked_add(load_offsets.src_start)) - .map(usize::from_safe_cast) - .ok_or(EOVERFLOW)?; + let dma_base = match src { + FalconDmaSource::Sysmem(dma_obj) => { + // Upper limit of transfer is `(num_transfers * DMA_LEN) + load_offsets.src_start`. + let end_offset = num_transfers + .checked_mul(DMA_LEN) + .and_then(|size| size.checked_add(load_offsets.src_start)) + .map(usize::from_safe_cast) + .ok_or(EOVERFLOW)?; - io_project!(dma_obj, [try: base_offset..end_offset]).dma_address() + io_project!(dma_obj, [try: base_offset..end_offset]).dma_address() + } + FalconDmaSource::Framebuffer { base } => base + .checked_add(u64::from_safe_cast(base_offset)) + .ok_or(EOVERFLOW)?, }; if dma_base % DmaAddress::from(DMA_LEN) > 0 { @@ -661,9 +672,13 @@ fn dma_load + FalconDmaLoadable>(&self, fw: &F) -> .with_mem_type(FalconFbifMemType::Physical) }); - self.dma_wr(&dma_obj, FalconMem::ImemSecure, fw.imem_sec_load_params())?; self.dma_wr( - &dma_obj, + FalconDmaSource::Sysmem(&dma_obj), + FalconMem::ImemSecure, + fw.imem_sec_load_params(), + )?; + self.dma_wr( + FalconDmaSource::Sysmem(&dma_obj), FalconMem::Dmem { tag: false }, fw.dmem_load_params(), )?; -- 2.56.0