From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>, Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev,
linux-stm32@st-md-mailman.stormreply.com,
linux-kernel@vger.kernel.org
Subject: [PATCH net-next 1/2] net: stmmac: dwmac-sun8i: Fix the RX_TH threshold encoding
Date: Tue, 10 Nov 2026 06:03:35 +0000 [thread overview]
Message-ID: <20261110-sun8i-emac-jumbo-v1-1-84bf00e9ffa3@gmail.com> (raw)
In-Reply-To: <20261110-sun8i-emac-jumbo-v1-0-84bf00e9ffa3@gmail.com>
From: Arun Iyengar <aiyengar1990@gmail.com>
The EMAC RX_CTL1 RX_TH field (bits 5:4) encodes 00 = 64 bytes and
01 = 32 bytes (H616 user manual v1.0, 6.5.10; 10 = 96 and 11 = 128 bytes
as in the driver). The driver has the first two swapped.
The values are only used in RX threshold mode, which dwmac-sun8i never
selects while RX checksum offload is on, so no current configuration is
affected.
Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 47954537b29e..0c82662fbe6e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -198,8 +198,9 @@ static const struct emac_variant emac_variant_h616_emac1 = {
/* Used in RX_CTL1*/
#define EMAC_RX_MD BIT(1)
#define EMAC_RX_TH_MASK GENMASK(5, 4)
-#define EMAC_RX_TH_32 0
-#define EMAC_RX_TH_64 (0x1 << 4)
+/* RX_CTL1 RX_TH encoding (H616 UM 6.5.10): 00 = 64, 01 = 32 bytes */
+#define EMAC_RX_TH_32 (0x1 << 4)
+#define EMAC_RX_TH_64 0
#define EMAC_RX_TH_96 (0x2 << 4)
#define EMAC_RX_TH_128 (0x3 << 4)
#define EMAC_RX_DMA_EN BIT(30)
--
2.55.0
next prev parent reply other threads:[~2026-11-10 6:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 6:03 [PATCH net-next 0/2] net: stmmac: dwmac-sun8i: Jumbo frames and an RX_TH fix Arun Iyengar via B4 Relay
2026-11-10 6:03 ` Arun Iyengar via B4 Relay [this message]
2026-11-10 6:03 ` [PATCH net-next 2/2] net: stmmac: dwmac-sun8i: Enable jumbo frames up to MTU 2018 Arun Iyengar via B4 Relay
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