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Tue, 10 Nov 2026 04:39:19 -0800 (PST) Received: from [192.168.0.15] ([2a02:a312:c59b:a180:251a:f25f:80fa:af1d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-498363e0019sm5050033f8f.38.2026.11.10.04.39.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2026 04:39:18 -0800 (PST) From: Artur Kowalski Date: Tue, 10 Nov 2026 13:39:07 +0100 Subject: [PATCH 2/6] watchdog: tegra_wdt: Move SoC specific parts into match data X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261110-t20-for-upstream-v1-2-5923449951fe@gmail.com> References: <20261110-t20-for-upstream-v1-0-5923449951fe@gmail.com> In-Reply-To: <20261110-t20-for-upstream-v1-0-5923449951fe@gmail.com> To: Daniel Lezcano , Thomas Gleixner , Thierry Reding , Jonathan Hunter , Wim Van Sebroeck , Guenter Roeck , Jonathan Corbet , Shuah Khan , Randy Dunlap , Philipp Zabel Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-doc@vger.kernel.org, clamor95@gmail.com, Artur Kowalski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3903; i=arturkow2000@gmail.com; s=default; h=from:subject:message-id; bh=IdSNK3LuIegx6VFe0fbvLhcfTCNF+IDFwU8FE8CK1jk=; b=owGbwMvMwCVmYeTc/TaVxZzxtFoSQ9ZngaJvv+4d9GuI2up/wP7BlaJyuamVN7eI1t/V2aCpO 9/2Z+XsjlIWBjEuBlkxRRazh0JfeOZ5vd/wcmsnzBxWJpAhDFycAjCRhLmMDH1H+Bk1dvS/MG3e 9OZLxZESviU5z/9FPThhvHp+cdpM05eMDOvCxDxzJVt7dua3vZh7I+ngp8Ocv/q+LIqaofKr6Ee bFiMA X-Developer-Key: i=arturkow2000@gmail.com; a=openpgp; fpr=F60710C8D69E03A01A2801CD87A47D20C2709637 The driver only supports the watchdog blocks of Tegra30 and later. Move the parts that differ between SoC generations, namely the watchdog operations, the maximum timeout and the register setup, into a per-SoC structure selected through the match data, so that support for Tegra20, which has no watchdog block, can be added. Suspend and resume call the operations through the watchdog device, so they work with any SoC. No functional change. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Artur Kowalski --- drivers/watchdog/tegra_wdt.c | 45 +++++++++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/watchdog/tegra_wdt.c b/drivers/watchdog/tegra_wdt.c index 6b3f65c4d593..bb6233320579 100644 --- a/drivers/watchdog/tegra_wdt.c +++ b/drivers/watchdog/tegra_wdt.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -63,6 +64,13 @@ struct tegra_wdt { void __iomem *tmr_regs; }; +struct tegra_wdt_soc { + const struct watchdog_ops *ops; + unsigned int max_timeout; + int (*init)(struct platform_device *pdev, struct tegra_wdt *wdt, + void __iomem *regs); +}; + #define WDT_HEARTBEAT 120 static int heartbeat = WDT_HEARTBEAT; module_param(heartbeat, int, 0); @@ -180,14 +188,32 @@ static const struct watchdog_ops tegra_wdt_ops = { .get_timeleft = tegra_wdt_get_timeleft, }; +static int tegra30_wdt_init(struct platform_device *pdev, struct tegra_wdt *wdt, + void __iomem *regs) +{ + wdt->wdt_regs = regs + WDT_BASE; + wdt->tmr_regs = regs + WDT_TIMER_BASE; + + return 0; +} + +static const struct tegra_wdt_soc tegra30_wdt_soc = { + .ops = &tegra_wdt_ops, + .max_timeout = MAX_WDT_TIMEOUT, + .init = tegra30_wdt_init, +}; + static int tegra_wdt_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + const struct tegra_wdt_soc *soc; struct watchdog_device *wdd; struct tegra_wdt *wdt; void __iomem *regs; int ret; + soc = device_get_match_data(dev); + /* This is the timer base. */ regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) @@ -201,23 +227,24 @@ static int tegra_wdt_probe(struct platform_device *pdev) if (!wdt) return -ENOMEM; - /* Initialize struct tegra_wdt. */ - wdt->wdt_regs = regs + WDT_BASE; - wdt->tmr_regs = regs + WDT_TIMER_BASE; - /* Initialize struct watchdog_device. */ wdd = &wdt->wdd; wdd->timeout = heartbeat; wdd->info = &tegra_wdt_info; - wdd->ops = &tegra_wdt_ops; + wdd->ops = soc->ops; wdd->min_timeout = MIN_WDT_TIMEOUT; - wdd->max_timeout = MAX_WDT_TIMEOUT; + wdd->max_timeout = soc->max_timeout; wdd->parent = dev; watchdog_set_drvdata(wdd, wdt); watchdog_set_nowayout(wdd, nowayout); + /* Initialize struct tegra_wdt. */ + ret = soc->init(pdev, wdt, regs); + if (ret) + return ret; + watchdog_stop_on_unregister(wdd); ret = devm_watchdog_register_device(dev, wdd); if (ret) @@ -236,7 +263,7 @@ static int tegra_wdt_suspend(struct device *dev) struct tegra_wdt *wdt = dev_get_drvdata(dev); if (watchdog_active(&wdt->wdd)) - tegra_wdt_stop(&wdt->wdd); + wdt->wdd.ops->stop(&wdt->wdd); return 0; } @@ -246,13 +273,13 @@ static int tegra_wdt_resume(struct device *dev) struct tegra_wdt *wdt = dev_get_drvdata(dev); if (watchdog_active(&wdt->wdd)) - tegra_wdt_start(&wdt->wdd); + wdt->wdd.ops->start(&wdt->wdd); return 0; } static const struct of_device_id tegra_wdt_of_match[] = { - { .compatible = "nvidia,tegra30-timer", }, + { .compatible = "nvidia,tegra30-timer", .data = &tegra30_wdt_soc }, { }, }; MODULE_DEVICE_TABLE(of, tegra_wdt_of_match); -- 2.56.0