[PATCH 1/2] arm64: dts: imx94: add NETC switch node

[wei.fang@oss.nxp.com]

From: Wei Fang <wei.fang@nxp.com>

The NETC switch of i.MX94 has three user ports and one CPU port. The CPU
port connects to an internal ENETC (enetc3) through the pseudo link. The
"dsa,member" property is used to specify the switch index, which is
reflected in the switch tag as an indication of the switch ID where the
frame originated.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx94.dtsi | 41 ++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi
index 020aa1da3315..952dad5aa656 100644
--- a/arch/arm64/boot/dts/freescale/imx94.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx94.dtsi
@@ -1521,6 +1521,47 @@ netc_timer0: ptp-timer@0,1 {
 					status = "disabled";
 				};
 
+				netc_switch: ethernet-switch@0,2 {
+					compatible = "pci1131,eef2";
+					reg = <0x200 0 0 0 0>;
+					dsa,member = <0 1>;
+					status = "disabled";
+
+					netc_switch_ports: ethernet-ports {
+						#address-cells = <1>;
+						#size-cells = <0>;
+
+						netc_switch_port0: ethernet-port@0 {
+							reg = <0>;
+							status = "disabled";
+						};
+
+						netc_switch_port1: ethernet-port@1 {
+							reg = <1>;
+							status = "disabled";
+						};
+
+						netc_switch_port2: ethernet-port@2 {
+							reg = <2>;
+							status = "disabled";
+						};
+
+						/* CPU port, a.k.a switch management port */
+						netc_switch_port3: ethernet-port@3 {
+							reg = <3>;
+							ethernet = <&enetc3>;
+							phy-mode = "internal";
+							status = "disabled";
+
+							fixed-link {
+								speed = <2500>;
+								full-duplex;
+								pause;
+							};
+						};
+					};
+				};
+
 				rcec@1,0 {
 					reg = <0x800 0 0 0 0>;
 					interrupts = <1>;
-- 
2.34.1