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Mon, 9 Nov 2026 23:08:31 -0600 From: Dileep Kumar Nagavarapu To: Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Michal Simek , Conall O'Griofa CC: , , , , Dileep Kumar Nagavarapu , Subject: [PATCH v5 01/16] iio: adc: xilinx-xadc: Correct write edge in CFG Date: Tue, 10 Nov 2026 10:31:46 +0530 Message-ID: <20261110050201.1850399-2-dileepkumar.nagavarapu@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261110050201.1850399-1-dileepkumar.nagavarapu@amd.com> References: <20261110050201.1850399-1-dileepkumar.nagavarapu@amd.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0002695D:EE_|DS7PR12MB9042:EE_ X-MS-Office365-Filtering-Correlation-Id: e7e955b9-9670-48fd-d520-08df3ee8ad29 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|23010399003|376014|1800799024|18002099003|22082099003|6133799003|10067099003|56012099006|11063799006|261021121427099003|261102123227099003|261026121527099003|261009223027099003|261021123027099003|261022075727099003; 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This is consistent with the XADCIF_CFG register default value. Configure WEDGE to 0 as specified by the TRM. Abnormal XADC temperature readings observed on Zynq-7000 are no longer reproducible with the documented setting applied. Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver") Co-developed-by: Conall O'Griofa Signed-off-by: Conall O'Griofa Signed-off-by: Dileep Kumar Nagavarapu Cc: stable@vger.kernel.org --- drivers/iio/adc/xilinx-xadc-core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index 66202b3a3abb..222571e75cb3 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -390,8 +390,7 @@ static int xadc_zynq_setup(struct platform_device *pdev, xadc_write_reg(xadc, XADC_ZYNQ_REG_INTSTS, ~0); xadc_write_reg(xadc, XADC_ZYNQ_REG_INTMSK, xadc->zynq_intmask); xadc_write_reg(xadc, XADC_ZYNQ_REG_CFG, XADC_ZYNQ_CFG_ENABLE | - XADC_ZYNQ_CFG_REDGE | XADC_ZYNQ_CFG_WEDGE | - tck_div | XADC_ZYNQ_CFG_IGAP(igap)); + XADC_ZYNQ_CFG_REDGE | tck_div | XADC_ZYNQ_CFG_IGAP(igap)); if (pcap_rate > XADC_ZYNQ_PCAP_RATE_MAX) { ret = clk_set_rate(xadc->clk, pcap_rate); -- 2.34.1