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Mon, 09 Nov 2026 23:06:47 -0800 (PST) Received: from localhost ([2001:19f0:8000:3bef:5400:6ff:fef9:667]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8baaae3f3e7sm511794b3a.40.2026.11.09.23.06.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 23:06:47 -0800 (PST) From: Inochi Amaoto To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Minas Harutyunyan , Greg Kroah-Hartman , Longbin Li , Dinh Nguyen , Paul Zimmerman , Felipe Balbi Cc: devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Yixun Lan Subject: [PATCH 0/4] usb: dwc2: Add USB DRD support on CV1800 Series SoC Date: Tue, 10 Nov 2026 15:06:21 +0800 Message-ID: <20261110070627.217946-1-inochiama@gmail.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The current DRD implementation of DRD will cause a interrupt flow on CV1800 Series SoC. It has two reasons: 1. The DRD does not sync the phy mode when change the controller mode, it is a violation of the DRD as it does not rely on a OTG phy. 2. The CV1800 is entered with a Session End Detected interrupt, but the DRD code has no change on it, so the controller will enter the interrupt storm. This patch add fixes for these two problem, and I have tested this on a Huashan PI board (it has a CV1812H SoC). Note: This patches set does not resolve all the problems, as usb_add_hcd() will override the role set by dwc2, but I am not sure whether it should change skip_phy_initialization of hcd. So I kept it as it is and users still needs to set the role in the userspace as "role-switch-default-mode" in devicetree takes no effect. Inochi Amaoto (4): usb: dwc2: gadget: honor pullup requests in core_connect usb: dwc2: drd: Sync the generic PHY mode with role requests usb: dwc2: Add USB DRD support on CV1800 series SoC riscv: dts: sophgo: Enable USB role switch on Huashan PI .../boot/dts/sophgo/cv1812h-huashan-pi.dts | 4 +- drivers/usb/dwc2/core.h | 5 +- drivers/usb/dwc2/drd.c | 77 +++++++++++++++---- drivers/usb/dwc2/gadget.c | 3 +- drivers/usb/dwc2/params.c | 1 + drivers/usb/dwc2/platform.c | 4 +- 6 files changed, 73 insertions(+), 21 deletions(-) -- 2.56.0