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From: Magnus Leatti <magnusleatti@kernelriot.com>
To: Paolo Abeni <pabeni@redhat.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: "Andrew Lunn" <andrew+netdev@lunn.ch>,
	"Jakub Kicinski" <kuba@kernel.org>,
	davem@davemloft.net, "Eric Dumazet" <edumazet@google.com>,
	"Simon Horman" <horms@kernel.org>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Lorenzo Bianconi" <lorenzo.bianconi@oss.qualcomm.com>,
	"Nicolai Buchwitz" <nb@tipi-net.de>,
	thomas.petazzoni@bootlin.com,
	"Alexis Lothoré" <alexis.lothore@bootlin.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH net v2] net: stmmac: Clear DMA errors for multi-channel interrupts
Date: Tue, 10 Nov 2026 06:52:11 -0300	[thread overview]
Message-ID: <20261110095211.16184-1-magnusleatti@kernelriot.com> (raw)
In-Reply-To: <817d2bd1-64fa-4a6f-bec6-5a4dd4d3a76f@redhat.com>

On 11/10/26 09:30, Paolo Abeni wrote:
> AFAICS 'statistics' here means accounting of some corner cases errors. I
> guess this could be a preferable route.

Hi Paolo,

Went and measured it, since my numbers from this morning only had RBU
masked. YT6801@7.3.3, this time with RBU and RPS both out of
the dwmac4 abnormal mask.

Floods first (4x 64B UDP, 3 runs): 0 MAC irqs and ~3.2M of 9.6M frames
delivered, in line with v2 and with RBU-only. Still 0 with 8x UDP +
TCP TX on top.

Then RPS: each XDP attach/detach restarts RX and raises it once.
MAC irqs per attach/detach, 3 cycles, idle link:

  both masked:   0
  v2:            2
  RBU-only:      1.5k - 25k
  stock:         0.9k - 32k

The fun part: I expected RPS to take the board down the way RBU does,
and it didn't. On stock and RBU-only it's a burst that goes quiet by
itself, and the box stays reachable the whole time. My guess is the RX
handler acks it on the next frame. I did not try an XDP attach in the
middle of a flood...

So both masked is the only one that sits at exactly 0 everywhere I
looked. The price is rx_buf_unav_irq and rx_process_stopped_irq, which
stay at 0.

Scope: I masked them for everyone, like d3265c19b35d did for xgmac2.
Masking only under multi-MSI would give the same result here and would
keep the counters on single-irq platforms.

Usual caveats: one board, and it's a 5.2 core so only the 4.10 mask
ran.

Magnus

  reply	other threads:[~2026-11-10  9:52 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 12:54 Maxime Chevallier
2026-11-03 13:21 ` Nicolai Buchwitz
2026-11-03 13:41 ` Lorenzo Bianconi
2026-11-03 16:58 ` Magnus Leatti
2026-11-04 12:57 ` netdev-bot+sashiko
2026-11-07 10:01   ` Magnus Leatti
2026-11-10  8:30     ` Paolo Abeni
2026-11-10  9:52       ` Magnus Leatti [this message]
2026-11-10  9:19   ` Magnus Leatti

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