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Miller" , Eric Dumazet , Jakub Kicinski , , Paolo Abeni CC: Gal Pressman , Leon Romanovsky , "open list" , , "Maor Dickman" , Mark Bloch , Moshe Shemesh , Or Har-Toov , Roi Dayan , Saeed Mahameed , Shay Drori , Tariq Toukan , Uri Dar Subject: [PATCH net] net/mlx5: Lag, Return error when enabling MPESW without LAG support Date: Tue, 10 Nov 2026 13:43:50 +0200 Message-ID: <20261110114350.2639891-1-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C6186:EE_|MN0PR12MB6222:EE_ X-MS-Office365-Filtering-Correlation-Id: d146232e-93f7-485a-bc2d-08df3f1ff830 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|36860700016|1800799024|82310400026|5023799004|11063799006|56012099006|261021121427099003|261021123027099003|261009223027099003|261102123227099003|261022075727099003|10067099003|18002099003; X-Microsoft-Antispam-Message-Info: bCbqtSCX3a8dHpnXZrn/cuNBmlCaQox1DKQoPG1G6dx02OYPQehHTEMYfzGbqZCmsedi5awXUX2oB0+Si4LuVUahC0BhxSr0LaiFjh/T1ST9UBLzRgPJZqhz2PWVCc9UksdLgvPVxLQeKGD1xwr0JR/HV+6jBLczyfzYlAjD3QBEqRv/Thpg32QYmm3p4Tn56NG8+PL/oTLnAAgXxH6Z8pJXR2WlGWb1OhFg8vq/SslT3H4Bhavuw5b+C0+zVVd1qvgyBhdHSHH53lmIXeHupB6/r2u9PWHlUz0iBBfx6tkEMsPH8XClTVwS7UvYwQWcwhYcMlADoaDmF9zs/cnw3XHm5msEYjoXAI2Xd54EkL2jTMxHp1+GArWv9NmEOpdnmhJCmPxefR2u59ZHdUdnTXh4KikKTLchAdZ2ZHkT1Ch8lA4oXe68llqxiQOaxTYcUBxIiz/GUo+mzmp04U19PQoa6/28+eB+LIxdmgIhYEi6yfjVE6QfD+E+2Ya8Lqsd0Bb8almFa3iKR/siPGwrZWMpyTKUG3SivmC7tXEsCGekob03+L6tdiWvbVEEg/a5y7iElf4XTF59SQNBPonHU280ef/JIYULuI1aiaPYDChJqcc+llZXiIvRGzCZnTTaavw+LZwknZTfRz2MU1fGifjDOTuCh9LMsYTFf0tDzSH/5zuFH7bRt3YsDSAXAt9x3V3aW6iU8mhX6QR3moPqQQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(23010399003)(376014)(36860700016)(1800799024)(82310400026)(5023799004)(11063799006)(56012099006)(261021121427099003)(261021123027099003)(261009223027099003)(261102123227099003)(261022075727099003)(10067099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PpWRRgq05if4GB5/Y4wPIAV6B8MjHTMU8xmh2G2sHROy1z4aMhxU3nSKKNohNENcw6yG5j4DG6wnLX2Jj0KyQrvEqYd/paLJmlTy0kuUNmUyKZ1w4hK7udqKAg/GOkhZZUu6B05EoXrnOC9+EFe3zk4RoqDU8y/0FFmRtQr/E0/4ikHdOKD3uThFCJbGyTqlnCPZxnFgqClp/e1RA9PKvdli+R4HgTWUkwh9YB2VlRtId0xV63hWhFdXFDSJtI+CyXRMRAf3x5xH5z9WJ31Ob+rkCvQ11ENyAJPuylrEVrm94A7VQeuta0oF4eSxgD4LoOMfqmNWtL5cTkQDt9ROt+JeGokJWU4i8saNbZj6QlavWd8coGHUj63LMzJxVs8hxj3I+R2tpBy73uhbOJjfrh2BPQ/8DTXeFqs8rpVefiVpaug6Rw3gseRHNzd7/oCM X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2026 11:44:24.9280 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d146232e-93f7-485a-bc2d-08df3f1ff830 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6186.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6222 From: Uri Dar When firmware reports a function as not LAG capable (lag_master=0 or num_lag_ports < 2), mlx5_lag_add_mdev() creates no LAG object for it. Enabling multiport E-Switch on such a device returns 0 from mlx5_lag_mpesw_queue_work(), so "devlink dev param set ... esw_multiport value true" reports success although nothing was enabled, and a following "devlink dev param show" still reports false. Return -EOPNOTSUPP instead. mlx5_lag_mpesw_disable() ignores the return value, so disabling keeps its current behavior. Fixes: a32327a3a02c ("net/mlx5: Lag, Control MultiPort E-Switch single FDB mode") Signed-off-by: Uri Dar Reviewed-by: Shay Drori Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c index abf72026c751..549d31812c2f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c @@ -227,7 +227,7 @@ static int mlx5_lag_mpesw_queue_work(struct mlx5_core_dev *dev, int err = 0; if (!ldev) - return 0; + return -EOPNOTSUPP; work = kzalloc_obj(*work); if (!work) base-commit: b71c101bbb9814d163c00234d43c41f0a17907d4 -- 2.44.0