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Tue, 10 Nov 2026 06:11:00 -0800 From: Shay Drory To: CC: , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH net-next 05/15] net/mlx5: LAG, decouple iteration end-of-walk from MLX5_MAX_PORTS Date: Tue, 10 Nov 2026 16:10:52 +0200 Message-ID: <20261110141052.433725-1-shayd@nvidia.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: <20261103171009.563034-1-tariqt@nvidia.com> <20261103171009.563034-6-tariqt@nvidia.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH7PEPF0000000A:EE_|CH2PR12MB4248:EE_ X-MS-Office365-Filtering-Correlation-Id: ef4844ad-8e02-4844-9142-08df3f34829e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|1800799024|376014|23010399003|4143699003|56012099006|11063799006|22082099003|18002099003|10067099003|261009223027099003|261028144727099003|261026140227099003|261022105027099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: g+5mENEJglTCu8UFXOp0yXjvXMTSaGIvEz/RCiz/VWzy6euF+u0gSvnFHLUSJ745zIzt4COER5dWXR5eJguxraAb8sGXMU/FS7OppLt0ONmlTlJsQNggzN9AEPCK2h+a63ek9/lRg9lI4W1mJn1r96F6V/v14iRwBVK3HEmKSO1wut0TeyEu6laBltAcGkPvFSFxbx6omIWUgf6D3jaVR2N9CdDH8AduFNR9mYuKD/74/KKw/ykytq6Rq/gAPg+IU4dT4LspvFGgMQMpA17DJEprz70YXe4NIDV7i90cLjiRQ9e1K6ukA+v5ezDrjIaPB5cpivpPIbu8MJrOsyD6Q/CH1eFrdFWYV3AZAeU2ZL9J2OiMVZgNSzUyS9aGrRmv7ViewZuZS+nQOaMjdw8BiU6QfJ1KcawdaIWugQPiLM6Rtv7dpIE0HxdmZUc6lAzt X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2026 14:11:27.1285 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef4844ad-8e02-4844-9142-08df3f34829e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: PH7PEPF0000000A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4248 On 10/11/2026 13:00, Paolo Abeni wrote: > Hi, > > there are a couple of unanswered comments here... > > On 11/3/26 18:09, Tariq Toukan wrote: > > @@ -2095,7 +2096,7 @@ static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev, > > break; > > } > > } > > - if (i < MLX5_MAX_PORTS) { > > + if (i < ldev->ports) { > > [medium] > Should this compare against ldev->max_funcs, like the other converted call > sites? > The iterator's end-of-walk value is now ldev->max_funcs. That holds both in > mlx5_get_next_lag_func() and in the mlx5_lag_for_each() condition. > Indices are never compacted and max_funcs never shrinks. So a PORT-marked > member can sit at an index in [ldev->ports, max_funcs) while the ldev still > has ldev->ports members. One way to get there: more PFs than num_lag_ports > join the ldev, and a lower-index one is removed later. > In that case the inner loop finds the matching pf and breaks with > i >= ldev->ports. idx has already been incremented, but this block is > skipped, so the bond_status |= (1 << idx) and has_inactive updates are > lost. The later check would then fail: > is_in_lag = num_slaves == ldev->ports && > bond_status == GENMASK(ldev->ports - 1, 0); > Wouldn't that leave this bond silently not offloaded? > The old i < MLX5_MAX_PORTS check covered the whole index range that the old > xa_alloc() limit allowed. This code is unchanged at the end of the series. > > This looks valid to me. This is answered in the cover letter: mlx5 creates an ldev per sw_guid, and PFs have a different sw_guid than VFs/SFs, so only PFs share this ldev. The only case with more PFs than num_lag_ports in one ldev is SD, and for SD the netdev notifier, and with it mlx5_handle_changeupper_event(), is not registered. So a PORT-marked member here always sits at an index below ldev->ports. > > if (netif_is_bond_master(upper)) { > > slave = bond_slave_get_rcu(ndev_tmp); > > if (slave) > > @@ -2360,13 +2361,16 @@ int mlx5_ldev_add_mdev(struct mlx5_lag *ldev, > > if (!pf) > > return -ENOMEM; > > > > - err = xa_alloc(&ldev->pfs, &idx, pf, XA_LIMIT(0, MLX5_MAX_PORTS - 1), > > + err = xa_alloc(&ldev->pfs, &idx, pf, XA_LIMIT(0, U8_MAX - 1), > > GFP_KERNEL); > > [high] > Can this let member indices reach 8 or more while several arrays are still > sized MLX5_MAX_PORTS? > > this is solved at the end of the series, so not really a problem. > > Note that there are more unanswered comments on patch 15/15. > > I think a v2 is need. For the future I suggest using smaller series: > 15 non trivial patches will have increasingly hard time with AI > reviews. Ack, will prepare a v2. > /P