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Reviewed-by: Liviu Dudau Signed-off-by: Karunika Choo --- v2: - Picked up R-b from Liviu - Fix includes raised by sashiko - Link: https://lore.kernel.org/all/20260922205441.263661F000FF@smtp.kernel.org/ v1: - Includes "panthor_device_io.h" directly in "panthor_device.h" instead of peppering multiple files with the header. drivers/gpu/drm/panthor/panthor_device.h | 73 +----------------- drivers/gpu/drm/panthor/panthor_device_io.h | 84 +++++++++++++++++++++ 2 files changed, 86 insertions(+), 71 deletions(-) create mode 100644 drivers/gpu/drm/panthor/panthor_device_io.h diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h index b55a3f9edd414..4add31b12cfd7 100644 --- a/drivers/gpu/drm/panthor/panthor_device.h +++ b/drivers/gpu/drm/panthor/panthor_device.h @@ -19,6 +19,8 @@ #include #include +#include "panthor_device_io.h" + struct panthor_csf; struct panthor_csf_ctx; struct panthor_device; @@ -495,77 +497,6 @@ panthor_exception_is_fault(u32 exception_code) const char *panthor_exception_name(struct panthor_device *ptdev, u32 exception_code); -static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data) -{ - writel(data, iomem + reg); -} - -static inline u32 gpu_read(void __iomem *iomem, u32 reg) -{ - return readl(iomem + reg); -} - -static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg) -{ - return readl_relaxed(iomem + reg); -} - -static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) -{ - gpu_write(iomem, reg, lower_32_bits(data)); - gpu_write(iomem, reg + 4, upper_32_bits(data)); -} - -static inline u64 gpu_read64(void __iomem *iomem, u32 reg) -{ - return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32)); -} - -static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg) -{ - return (gpu_read_relaxed(iomem, reg) | - ((u64)gpu_read_relaxed(iomem, reg + 4) << 32)); -} - -static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg) -{ - u32 lo, hi1, hi2; - do { - hi1 = gpu_read(iomem, reg + 4); - lo = gpu_read(iomem, reg); - hi2 = gpu_read(iomem, reg + 4); - } while (hi1 != hi2); - return lo | ((u64)hi2 << 32); -} - -#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ - read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false, \ - iomem, reg) - -#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ - timeout_us) \ - read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us, \ - false, iomem, reg) - -#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ - read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \ - iomem, reg) - -#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ - timeout_us) \ - read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \ - false, iomem, reg) - -#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ - timeout_us) \ - read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us, \ - timeout_us, false, iomem, reg) - -#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us, \ - timeout_us) \ - read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us, \ - false, iomem, reg) - #define INT_RAWSTAT 0x0 #define INT_CLEAR 0x4 #define INT_MASK 0x8 diff --git a/drivers/gpu/drm/panthor/panthor_device_io.h b/drivers/gpu/drm/panthor/panthor_device_io.h new file mode 100644 index 0000000000000..ce417c64abb44 --- /dev/null +++ b/drivers/gpu/drm/panthor/panthor_device_io.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: GPL-2.0 or MIT */ +/* Copyright 2026 ARM Limited. All rights reserved. */ + +#ifndef __PANTHOR_DEVICE_IO_H__ +#define __PANTHOR_DEVICE_IO_H__ + +#include +#include +#include + +static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data) +{ + writel(data, iomem + reg); +} + +static inline u32 gpu_read(void __iomem *iomem, u32 reg) +{ + return readl(iomem + reg); +} + +static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg) +{ + return readl_relaxed(iomem + reg); +} + +static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) +{ + gpu_write(iomem, reg, lower_32_bits(data)); + gpu_write(iomem, reg + 4, upper_32_bits(data)); +} + +static inline u64 gpu_read64(void __iomem *iomem, u32 reg) +{ + return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32)); +} + +static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg) +{ + return (gpu_read_relaxed(iomem, reg) | + ((u64)gpu_read_relaxed(iomem, reg + 4) << 32)); +} + +static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg) +{ + u32 lo, hi1, hi2; + + do { + hi1 = gpu_read(iomem, reg + 4); + lo = gpu_read(iomem, reg); + hi2 = gpu_read(iomem, reg + 4); + } while (hi1 != hi2); + return lo | ((u64)hi2 << 32); +} + +#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ + read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false, \ + iomem, reg) + +#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ + timeout_us) \ + read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us, \ + false, iomem, reg) + +#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ + read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \ + iomem, reg) + +#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ + timeout_us) \ + read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \ + false, iomem, reg) + +#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ + timeout_us) \ + read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us, \ + timeout_us, false, iomem, reg) + +#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us, \ + timeout_us) \ + read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us, \ + false, iomem, reg) + + +#endif /* __PANTHOR_DEVICE_IO_H__ */ -- 2.43.0