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Tue, 10 Nov 2026 20:26:14 +0000 From: Ali Rouhi To: "jiri@resnulli.us" CC: "vadim.fedorenko@linux.dev" , "arkadiusz.kubalewski@intel.com" , "ivecera@redhat.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "cjubran@nvidia.com" , "Oleg.Zadorozhnyi@devoxsoftware.com" , "prabhakar.mahadev-lad.rj@bp.renesas.com" , "devicetree@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH net-next v15 04/13] dpll: add basic SiTime SiT9531x support Thread-Topic: [PATCH net-next v15 04/13] dpll: add basic SiTime SiT9531x support Thread-Index: AQHdcVG5ugD90PBkuUyHv55svtfJww== Date: Tue, 10 Nov 2026 20:26:11 +0000 Message-ID: <20261110202607.55744-5-arouhi@sitime.com> References: <20261110202607.55744-1-arouhi@sitime.com> In-Reply-To: <20261110202607.55744-1-arouhi@sitime.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: mx.microsoft.com 1; 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From: Oleg Zadorozhnyi =0A= =0A= Add the I2C probe for the SiTime SiT9531x family: four PLLs, up to eight=0A= inputs and up to twelve outputs, configured from efuse or from a blob=0A= applied before the driver binds. Later patches register the PLLs with=0A= the DPLL subsystem.=0A= =0A= The register space is 32 pages of 256 registers, selected through offset=0A= 0xFF of any page. The regmap is the flat 256-byte window, and the=0A= accessors select the page under a lock.=0A= =0A= Probe takes the optional reset line and the XO rate, waits the boot time=0A= with reset deasserted so the configuration the part holds is kept, and=0A= identifies the variant from the ID register.=0A= =0A= Suggested-by: Ivan Vecera =0A= Signed-off-by: Oleg Zadorozhnyi =0A= Signed-off-by: Ali Rouhi =0A= ---=0A= MAINTAINERS | 1 +=0A= drivers/dpll/Kconfig | 2 +=0A= drivers/dpll/Makefile | 1 +=0A= drivers/dpll/sit9531x/Kconfig | 13 ++=0A= drivers/dpll/sit9531x/Makefile | 4 +=0A= drivers/dpll/sit9531x/core.c | 308 +++++++++++++++++++++++++++++++++=0A= drivers/dpll/sit9531x/core.h | 88 ++++++++++=0A= drivers/dpll/sit9531x/regs.h | 36 ++++=0A= 8 files changed, 453 insertions(+)=0A= create mode 100644 drivers/dpll/sit9531x/Kconfig=0A= create mode 100644 drivers/dpll/sit9531x/Makefile=0A= create mode 100644 drivers/dpll/sit9531x/core.c=0A= create mode 100644 drivers/dpll/sit9531x/core.h=0A= create mode 100644 drivers/dpll/sit9531x/regs.h=0A= =0A= diff --git a/MAINTAINERS b/MAINTAINERS=0A= index 6c831bf9e812..936996cef03a 100644=0A= --- a/MAINTAINERS=0A= +++ b/MAINTAINERS=0A= @@ -25875,6 +25875,7 @@ M: Ali Rouhi =0A= L: netdev@vger.kernel.org=0A= S: Maintained=0A= F: Documentation/devicetree/bindings/dpll/sitime,sit95316.yaml=0A= +F: drivers/dpll/sit9531x/=0A= =0A= SL28 CPLD MFD DRIVER=0A= M: Michael Walle =0A= diff --git a/drivers/dpll/Kconfig b/drivers/dpll/Kconfig=0A= index be98969f040a..f8f7ca121b93 100644=0A= --- a/drivers/dpll/Kconfig=0A= +++ b/drivers/dpll/Kconfig=0A= @@ -23,6 +23,8 @@ config DPLL_REFCNT_TRACKER=0A= =0A= If unsure, say N.=0A= =0A= +source "drivers/dpll/sit9531x/Kconfig"=0A= +=0A= source "drivers/dpll/zl3073x/Kconfig"=0A= =0A= endmenu=0A= diff --git a/drivers/dpll/Makefile b/drivers/dpll/Makefile=0A= index 9e7a3a3e592e..4adc50d748d4 100644=0A= --- a/drivers/dpll/Makefile=0A= +++ b/drivers/dpll/Makefile=0A= @@ -8,4 +8,5 @@ dpll-y +=3D dpll_core.o=0A= dpll-y +=3D dpll_netlink.o=0A= dpll-y +=3D dpll_nl.o=0A= =0A= +obj-$(CONFIG_SIT9531X_DPLL) +=3D sit9531x/=0A= obj-$(CONFIG_ZL3073X) +=3D zl3073x/=0A= diff --git a/drivers/dpll/sit9531x/Kconfig b/drivers/dpll/sit9531x/Kconfig= =0A= new file mode 100644=0A= index 000000000000..ac5b7f31a034=0A= --- /dev/null=0A= +++ b/drivers/dpll/sit9531x/Kconfig=0A= @@ -0,0 +1,13 @@=0A= +# SPDX-License-Identifier: GPL-2.0-only=0A= +=0A= +config SIT9531X_DPLL=0A= + tristate "SiTime SiT9531x DPLL driver"=0A= + depends on I2C && NET=0A= + select DPLL=0A= + select REGMAP_I2C=0A= + help=0A= + Driver for SiTime SiT9531x family clock generators=0A= + (SiT95317, SiT95316).=0A= +=0A= + To compile this driver as a module, choose M here: the=0A= + module will be called sit9531x.=0A= diff --git a/drivers/dpll/sit9531x/Makefile b/drivers/dpll/sit9531x/Makefil= e=0A= new file mode 100644=0A= index 000000000000..a221fe55386a=0A= --- /dev/null=0A= +++ b/drivers/dpll/sit9531x/Makefile=0A= @@ -0,0 +1,4 @@=0A= +# SPDX-License-Identifier: GPL-2.0-only=0A= +=0A= +obj-$(CONFIG_SIT9531X_DPLL) +=3D sit9531x.o=0A= +sit9531x-y :=3D core.o=0A= diff --git a/drivers/dpll/sit9531x/core.c b/drivers/dpll/sit9531x/core.c=0A= new file mode 100644=0A= index 000000000000..3ec1ab5aa56c=0A= --- /dev/null=0A= +++ b/drivers/dpll/sit9531x/core.c=0A= @@ -0,0 +1,308 @@=0A= +// SPDX-License-Identifier: GPL-2.0=0A= +/*=0A= + * SiTime SiT9531x DPLL core driver=0A= + *=0A= + * Copyright (C) 2026 SiTime Corp.=0A= + * Author: Ali Rouhi =0A= + * Author: Oleg Zadorozhnyi =0A= + *=0A= + * I2C probe, paged regmap configuration and register access helpers.=0A= + */=0A= +=0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +=0A= +#include "core.h"=0A= +#include "regs.h"=0A= +=0A= +#define SIT9531X_CHIP(_id, _nin, _nout, _name, _map) \=0A= + { .id =3D (_id), .num_inputs =3D (_nin), .num_outputs =3D (_nout), \=0A= + .name =3D (_name), .clkout_map =3D (_map) }=0A= +=0A= +/* Per-variant output index -> physical slot mapping */=0A= +static const u8 clkout_map_95317[] =3D {0, 3, 4, 5, 7, 8, 9, 11};=0A= +static const u8 clkout_map_95316[] =3D {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, = 11};=0A= +=0A= +static const struct sit9531x_chip_info sit9531x_chip_ids[] =3D {=0A= + SIT9531X_CHIP(SIT9531X_VARIANT_ID_95317, 8, 8, "SiT95317",=0A= + clkout_map_95317),=0A= + SIT9531X_CHIP(SIT9531X_VARIANT_ID_95316, 8, 12, "SiT95316",=0A= + clkout_map_95316),=0A= +};=0A= +=0A= +/*=0A= + * One 256-register page is visible at a time, selected by offset 0xFF on = every=0A= + * page. The map covers that window, uncached; the accessors select the pa= ge.=0A= + */=0A= +static const struct regmap_config sit9531x_regmap_config =3D {=0A= + .reg_bits =3D 8,=0A= + .val_bits =3D 8,=0A= + .max_register =3D SIT9531X_PAGE_SEL,=0A= + .cache_type =3D REGCACHE_NONE,=0A= +};=0A= +=0A= +/* Caller holds page_lock. */=0A= +static int sit9531x_page_select(struct sit9531x_dev *sitdev, int page)=0A= +{=0A= + int rc;=0A= +=0A= + if (sitdev->page =3D=3D page)=0A= + return 0;=0A= +=0A= + sitdev->page =3D -1;=0A= + rc =3D regmap_write(sitdev->regmap, SIT9531X_PAGE_SEL, page);=0A= + if (rc)=0A= + return rc;=0A= + sitdev->page =3D page;=0A= +=0A= + return 0;=0A= +}=0A= +=0A= +/* Caller holds page_lock. */=0A= +static int sit9531x_read_locked(struct sit9531x_dev *sitdev, unsigned int = reg,=0A= + unsigned int *val)=0A= +{=0A= + int rc;=0A= +=0A= + rc =3D sit9531x_page_select(sitdev, SIT9531X_REG_PAGE(reg));=0A= + if (rc)=0A= + return rc;=0A= + rc =3D regmap_read(sitdev->regmap, SIT9531X_REG_OFFSET(reg), val);=0A= + if (rc)=0A= + sitdev->page =3D -1;=0A= +=0A= + return rc;=0A= +}=0A= +=0A= +/* Caller holds page_lock. */=0A= +static int sit9531x_write_locked(struct sit9531x_dev *sitdev,=0A= + unsigned int reg, u8 val)=0A= +{=0A= + int rc;=0A= +=0A= + rc =3D sit9531x_page_select(sitdev, SIT9531X_REG_PAGE(reg));=0A= + if (rc)=0A= + return rc;=0A= + rc =3D regmap_write(sitdev->regmap, SIT9531X_REG_OFFSET(reg), val);=0A= + if (rc)=0A= + sitdev->page =3D -1;=0A= + else if (SIT9531X_REG_OFFSET(reg) =3D=3D SIT9531X_PAGE_SEL)=0A= + sitdev->page =3D val;=0A= +=0A= + return rc;=0A= +}=0A= +=0A= +/* @reg is a SIT9531X_REG(page, offset) value. */=0A= +int sit9531x_read_u8(struct sit9531x_dev *sitdev, unsigned int reg,=0A= + u8 *val)=0A= +{=0A= + unsigned int tmp;=0A= + int rc;=0A= +=0A= + mutex_lock(&sitdev->page_lock);=0A= + rc =3D sit9531x_read_locked(sitdev, reg, &tmp);=0A= + mutex_unlock(&sitdev->page_lock);=0A= + if (rc) {=0A= + dev_err_ratelimited(sitdev->dev,=0A= + "Failed to read page 0x%02x reg 0x%02x: %d\n",=0A= + SIT9531X_REG_PAGE(reg),=0A= + SIT9531X_REG_OFFSET(reg), rc);=0A= + return rc;=0A= + }=0A= + *val =3D (u8)tmp;=0A= +=0A= + return 0;=0A= +}=0A= +=0A= +/* @reg is a SIT9531X_REG(page, offset) value. */=0A= +int sit9531x_write_u8(struct sit9531x_dev *sitdev, unsigned int reg,=0A= + u8 val)=0A= +{=0A= + int rc;=0A= +=0A= + mutex_lock(&sitdev->page_lock);=0A= + rc =3D sit9531x_write_locked(sitdev, reg, val);=0A= + mutex_unlock(&sitdev->page_lock);=0A= + if (rc)=0A= + dev_err_ratelimited(sitdev->dev,=0A= + "Failed to write page 0x%02x reg 0x%02x: %d\n",=0A= + SIT9531X_REG_PAGE(reg),=0A= + SIT9531X_REG_OFFSET(reg), rc);=0A= +=0A= + return rc;=0A= +}=0A= +=0A= +int sit9531x_read_pll_u8(struct sit9531x_dev *sitdev, u8 pll_idx,=0A= + u8 offset, u8 *val)=0A= +{=0A= + u8 page =3D sit9531x_pll_page(pll_idx);=0A= +=0A= + return sit9531x_read_u8(sitdev, SIT9531X_REG(page, offset), val);=0A= +}=0A= +=0A= +int sit9531x_write_pll_u8(struct sit9531x_dev *sitdev, u8 pll_idx,=0A= + u8 offset, u8 val)=0A= +{=0A= + u8 page =3D sit9531x_pll_page(pll_idx);=0A= +=0A= + return sit9531x_write_u8(sitdev, SIT9531X_REG(page, offset), val);=0A= +}=0A= +=0A= +int sit9531x_update_pll_u8(struct sit9531x_dev *sitdev, u8 pll_idx,=0A= + u8 offset, u8 mask, u8 val)=0A= +{=0A= + u8 page =3D sit9531x_pll_page(pll_idx);=0A= + unsigned int reg =3D SIT9531X_REG(page, offset);=0A= + unsigned int orig, tmp;=0A= + int rc;=0A= +=0A= + mutex_lock(&sitdev->page_lock);=0A= + rc =3D sit9531x_read_locked(sitdev, reg, &orig);=0A= + if (!rc) {=0A= + tmp =3D (orig & ~mask) | (val & mask);=0A= + if (tmp !=3D orig)=0A= + rc =3D sit9531x_write_locked(sitdev, reg, tmp);=0A= + }=0A= + mutex_unlock(&sitdev->page_lock);=0A= + if (rc)=0A= + dev_err_ratelimited(sitdev->dev,=0A= + "Failed to update page 0x%02x reg 0x%02x: %d\n",=0A= + page, offset, rc);=0A= +=0A= + return rc;=0A= +}=0A= +=0A= +static int sit9531x_read_variant_id(struct sit9531x_dev *sitdev, u8 *id)= =0A= +{=0A= + return sit9531x_read_u8(sitdev, SIT9531X_REG_VARIANT_ID, id);=0A= +}=0A= +=0A= +static const struct sit9531x_chip_info *sit9531x_match_variant(u8 id)=0A= +{=0A= + unsigned int i;=0A= +=0A= + for (i =3D 0; i < ARRAY_SIZE(sit9531x_chip_ids); i++) {=0A= + if (sit9531x_chip_ids[i].id =3D=3D id)=0A= + return &sit9531x_chip_ids[i];=0A= + }=0A= +=0A= + return NULL;=0A= +}=0A= +=0A= +static int sit9531x_dev_probe(struct sit9531x_dev *sitdev)=0A= +{=0A= + struct clk *xtal_clk;=0A= + u8 variant_id;=0A= + int rc;=0A= +=0A= + /*=0A= + * Fvco =3D Fref * (DIVN + frac/2^32); Fref is the rate of the XO feeding= =0A= + * XIN/XO_CLK.=0A= + */=0A= + xtal_clk =3D devm_clk_get_optional_enabled(sitdev->dev, "xtal");=0A= + if (IS_ERR(xtal_clk))=0A= + return dev_err_probe(sitdev->dev, PTR_ERR(xtal_clk),=0A= + "Failed to get xtal clock\n");=0A= + sitdev->xtal_freq =3D clk_get_rate(xtal_clk);=0A= + if (!sitdev->xtal_freq) {=0A= + u32 freq;=0A= +=0A= + if (!device_property_read_u32(sitdev->dev, "clock-frequency",=0A= + &freq))=0A= + sitdev->xtal_freq =3D freq;=0A= + }=0A= + if (!sitdev->xtal_freq)=0A= + return dev_err_probe(sitdev->dev, -EINVAL,=0A= + "no xtal rate: provide clocks=3D<&xo> + clock-names=3D\"xtal\", o= r a clock-frequency property\n");=0A= +=0A= + /*=0A= + * Keep reset deasserted, never pulse it: a reset discards the=0A= + * configuration from efuse or a pre-probe NVM blob. Release it before=0A= + * the first I2C access.=0A= + */=0A= + sitdev->reset_gpio =3D devm_gpiod_get_optional(sitdev->dev, "reset",=0A= + GPIOD_OUT_LOW);=0A= + if (IS_ERR(sitdev->reset_gpio))=0A= + return dev_err_probe(sitdev->dev, PTR_ERR(sitdev->reset_gpio),=0A= + "Failed to request reset gpio\n");=0A= + if (sitdev->reset_gpio)=0A= + fsleep(10000); /* internal boot after release */=0A= +=0A= + rc =3D sit9531x_read_variant_id(sitdev, &variant_id);=0A= + if (rc)=0A= + return rc;=0A= +=0A= + sitdev->info =3D sit9531x_match_variant(variant_id);=0A= + if (!sitdev->info)=0A= + return dev_err_probe(sitdev->dev, -ENODEV,=0A= + "Unknown variant ID: 0x%02x\n",=0A= + variant_id);=0A= +=0A= + rc =3D devm_mutex_init(sitdev->dev, &sitdev->multiop_lock);=0A= + if (rc)=0A= + return dev_err_probe(sitdev->dev, rc,=0A= + "Failed to initialize mutex\n");=0A= +=0A= + dev_info(sitdev->dev, "%s detected, %u inputs, %u outputs\n",=0A= + sitdev->info->name, sitdev->info->num_inputs,=0A= + sitdev->info->num_outputs);=0A= +=0A= + return 0;=0A= +}=0A= +=0A= +static int sit9531x_i2c_probe(struct i2c_client *client)=0A= +{=0A= + struct sit9531x_dev *sitdev;=0A= + struct regmap *regmap;=0A= + int rc;=0A= +=0A= + regmap =3D devm_regmap_init_i2c(client, &sit9531x_regmap_config);=0A= + if (IS_ERR(regmap))=0A= + return dev_err_probe(&client->dev, PTR_ERR(regmap),=0A= + "Failed to initialize regmap\n");=0A= +=0A= + sitdev =3D devm_kzalloc(&client->dev, sizeof(*sitdev), GFP_KERNEL);=0A= + if (!sitdev)=0A= + return -ENOMEM;=0A= +=0A= + sitdev->dev =3D &client->dev;=0A= + sitdev->client =3D client;=0A= + sitdev->regmap =3D regmap;=0A= + sitdev->page =3D -1;=0A= + rc =3D devm_mutex_init(&client->dev, &sitdev->page_lock);=0A= + if (rc)=0A= + return rc;=0A= + i2c_set_clientdata(client, sitdev);=0A= +=0A= + return sit9531x_dev_probe(sitdev);=0A= +}=0A= +=0A= +static const struct of_device_id sit9531x_of_match[] =3D {=0A= + { .compatible =3D "sitime,sit95316" },=0A= + { .compatible =3D "sitime,sit95317" },=0A= + { }=0A= +};=0A= +MODULE_DEVICE_TABLE(of, sit9531x_of_match);=0A= +=0A= +static struct i2c_driver sit9531x_i2c_driver =3D {=0A= + .driver =3D {=0A= + .name =3D "sit9531x",=0A= + .of_match_table =3D sit9531x_of_match,=0A= + },=0A= + .probe =3D sit9531x_i2c_probe,=0A= +};=0A= +module_i2c_driver(sit9531x_i2c_driver);=0A= +=0A= +MODULE_AUTHOR("Ali Rouhi ");=0A= +MODULE_AUTHOR("Oleg Zadorozhnyi ");=0A= +MODULE_DESCRIPTION("SiTime SiT9531x DPLL subsystem driver");=0A= +MODULE_LICENSE("GPL");=0A= diff --git a/drivers/dpll/sit9531x/core.h b/drivers/dpll/sit9531x/core.h=0A= new file mode 100644=0A= index 000000000000..0f826313eff8=0A= --- /dev/null=0A= +++ b/drivers/dpll/sit9531x/core.h=0A= @@ -0,0 +1,88 @@=0A= +/* SPDX-License-Identifier: GPL-2.0 */=0A= +/*=0A= + * SiTime SiT9531x DPLL core driver=0A= + *=0A= + * Copyright (C) 2026 SiTime Corp.=0A= + * Author: Ali Rouhi =0A= + * Author: Oleg Zadorozhnyi =0A= + *=0A= + * Device structure, register access helpers, and core function=0A= + * declarations.=0A= + */=0A= +=0A= +#ifndef _SIT9531X_CORE_H=0A= +#define _SIT9531X_CORE_H=0A= +=0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +#include =0A= +=0A= +#include "regs.h"=0A= +=0A= +#define SIT9531X_NUM_PLLS 4=0A= +#define SIT9531X_MAX_INPUTS 8=0A= +#define SIT9531X_MAX_OUTPUTS 12=0A= +=0A= +/*=0A= + * struct sit9531x_chip_info - chip variant identification=0A= + * @id: variant ID byte read from the device=0A= + * @num_inputs: number of input clock pins=0A= + * @num_outputs: number of output clock pins=0A= + * @name: variant name=0A= + * @clkout_map: physical slot of each output index=0A= + */=0A= +struct sit9531x_chip_info {=0A= + u8 id;=0A= + u8 num_inputs;=0A= + u8 num_outputs;=0A= + const char *name;=0A= + const u8 *clkout_map;=0A= +};=0A= +=0A= +/*=0A= + * struct sit9531x_dev - SiT9531x device instance=0A= + * @dev: parent device=0A= + * @client: I2C client backing @regmap=0A= + * @regmap: the 256-byte register window=0A= + * @info: chip variant info=0A= + * @multiop_lock: serializes multi-register operations=0A= + * @page_lock: held across a page select and its transfer; nests inside=0A= + * @multiop_lock=0A= + * @page: current page, -1 when unknown=0A= + * @xtal_freq: crystal frequency in Hz=0A= + * @reset_gpio: optional reset line, NULL if absent=0A= + */=0A= +struct sit9531x_dev {=0A= + struct device *dev;=0A= + struct i2c_client *client;=0A= + struct regmap *regmap;=0A= + const struct sit9531x_chip_info *info;=0A= + /* Serializes multi-step register sequences */=0A= + struct mutex multiop_lock;=0A= + /* Serializes a page select and the transfer it is for */=0A= + struct mutex page_lock;=0A= + int page;=0A= +=0A= + u32 xtal_freq;=0A= +=0A= + struct gpio_desc *reset_gpio;=0A= +};=0A= +=0A= +/* Register page of PLL @pll_idx (0 =3D PLLA, 3 =3D PLLD). */=0A= +static inline u8 sit9531x_pll_page(u8 pll_idx)=0A= +{=0A= + return SIT9531X_PAGE_PLLA + pll_idx;=0A= +}=0A= +=0A= +int sit9531x_read_u8(struct sit9531x_dev *sitdev, unsigned int reg, u8 *va= l);=0A= +int sit9531x_write_u8(struct sit9531x_dev *sitdev, unsigned int reg, u8 va= l);=0A= +int sit9531x_read_pll_u8(struct sit9531x_dev *sitdev, u8 pll_idx, u8 offse= t,=0A= + u8 *val);=0A= +int sit9531x_write_pll_u8(struct sit9531x_dev *sitdev, u8 pll_idx, u8 offs= et,=0A= + u8 val);=0A= +int sit9531x_update_pll_u8(struct sit9531x_dev *sitdev, u8 pll_idx, u8 off= set,=0A= + u8 mask, u8 val);=0A= +=0A= +#endif /* _SIT9531X_CORE_H */=0A= diff --git a/drivers/dpll/sit9531x/regs.h b/drivers/dpll/sit9531x/regs.h=0A= new file mode 100644=0A= index 000000000000..3a6151f44d61=0A= --- /dev/null=0A= +++ b/drivers/dpll/sit9531x/regs.h=0A= @@ -0,0 +1,36 @@=0A= +/* SPDX-License-Identifier: GPL-2.0 */=0A= +/*=0A= + * SiTime SiT9531x register definitions=0A= + *=0A= + * Copyright (C) 2026 SiTime Corp.=0A= + * Author: Ali Rouhi =0A= + * Author: Oleg Zadorozhnyi =0A= + */=0A= +=0A= +#ifndef _SIT9531X_REGS_H=0A= +#define _SIT9531X_REGS_H=0A= +=0A= +/*=0A= + * The page select is at offset 0xFF in every page; some pages are paired,= e.g.=0A= + * 0x0A/0x1A for PLLA.=0A= + */=0A= +#define SIT9531X_PAGE_SEL 0xFF=0A= +#define SIT9531X_PAGE_SIZE 0x100=0A= +#define SIT9531X_NUM_PAGES 32=0A= +=0A= +#define SIT9531X_REG(_page, _offset) (((_page) << 8) | (_offset))=0A= +#define SIT9531X_REG_PAGE(_reg) ((_reg) >> 8)=0A= +#define SIT9531X_REG_OFFSET(_reg) ((_reg) & 0xFF)=0A= +=0A= +#define SIT9531X_PAGE_OUTSYS0 0x03=0A= +#define SIT9531X_PAGE_OUTSYS1 0x04=0A= +#define SIT9531X_PAGE_PLLA 0x0A=0A= +#define SIT9531X_PAGE_PLLA_EXT 0x1A=0A= +=0A= +/* Reg 0x03 holds an unrelated revision byte, not part of the variant ID *= /=0A= +#define SIT9531X_REG_VARIANT_ID SIT9531X_REG(0x00, 0x02)=0A= +=0A= +#define SIT9531X_VARIANT_ID_95317 0x17=0A= +#define SIT9531X_VARIANT_ID_95316 0x31=0A= +=0A= +#endif /* _SIT9531X_REGS_H */=0A= -- =0A= 2.39.2 (Apple Git-143)=0A= =0A=